MULTIPLE CORE DATA PROCESSOR WITH USAGE MONITORING

• US 20120036398A1
• Filed: 10/13/2011
• Published: 02/09/2012
• Est. Priority Date: 04/22/2010
• Status: Abandoned Application

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Moyer, William C., Bearden, David R., Ramaraju, Ravindraraj
• Application Number:
  US13/272,725
• Publication Number:
  US 20120036398A1
• Time in Patent Office: Days
• US Class Current: 714/48
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: G06F 16/217 Database tuning G06F16/2282 takes precedence; database performance monitoring G06F11/3409
• CPC Class Codes: G06F 2209/504 Resource capping
• CPC Class Codes: G06F 2209/508 Monitor
• CPC Class Codes: G06F 9/505 considering the load
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A data processor with a plurality of processor cores. Accumulated usage information of each of the plurality of processor cores is stored in a storage device within the data processor, wherein the accumulated usage information is indicative of accumulated usage of each processor core of the plurality of processor cores. The processor uses the accumulated usage information in selecting processor cores to perform processor operations.

Claims

1. In a multi core data processor, a method comprising:

receiving an indication to perform a processor operation;

selecting at least one selected processor core of a plurality of processor cores of the data processor to perform the processor operation, wherein the selecting includes using accumulated usage information of at least one of the plurality of processor cores, wherein accumulated usage information of a processor core is indicative of accumulated usage of the processor core; and

performing the processor operation by the at least one selected processor core.

2. The method of claim 1 further comprising:

wherein the selecting includes not selecting cores having an allocated usage that exceeds a lifetime maximum allocated usage of the core.

3. The method of claim 1 further comprising:

when a lifetime maximum allocated usage is determined to have been exceeded by a core of the at least one selected processor core, modifying the operation of the data processor to change an operating condition parameter of the at least one selected processor core.

4. The method of claim 1 further comprising retrieving accumulated usage information of the plurality of processor cores including the at least one selected processor core and using the accumulated usage information retrieved in the selecting.

5. The method of claim 1 wherein:

the selecting the at least one selected processor core further comprises;

selecting the at least one selected processor core from a selection pool of the plurality of processor cores;

if the accumulated usage for each processor core of the plurality of processor cores is greater than or equal to a first threshold of the core, then the selection pool consists of processor cores of the plurality of processor cores that are configurable to perform redundant operations with another processor core of the selection pool;

if the accumulated usage for each processor core of the plurality of processor cores is greater than or equal to the first threshold of the core, the performing the processor operation further comprises configuring a plurality of the selected processor cores for redundant operation for the performing the processor operation.

6. The method of claim 5 further comprising:

after said performing, checking the results of the redundant operation in performing the processor operation to determine if the processor operation was performed correctly.

7. The method of claim 5 wherein if the accumulated usage for any processor core is not greater than or equal to the first threshold of the processor core, the performing the processor operation does not include configuring a plurality of the selected processor cores for redundant operation for the performing the processor operation.

8. The method of claim 5 if the accumulated usage of any processor core of the plurality is not greater than or equal to the first threshold of the processor core, the selection pool does not include any processor core with an accumulated usage greater than or equal to the first threshold of the processor core.

9. The method of claim 1 wherein:

the selecting the at least one selected processor core further comprises selecting the at least one selected processor core from a selection pool of the plurality of processor cores;

the plurality of processor cores includes reserved processor cores and non reserved processor cores;

if the accumulated usage of any processor core of the plurality is not greater than or equal to the first threshold of the core, the selection pool does not include any reserved processor core with an accumulated usage greater than or equal to a second threshold of the reserved processor core and does include any non reserved processor core with an accumulated usage greater than or equal to the first threshold of the non reserved processor core;

wherein the first threshold is greater than the second threshold for the reserved processor cores.

10. The method of claim 1 further comprising:

determining whether the processor operation requires reliability; and

if the processor operation does not require reliability, then the selecting at least one selected processor core further comprises selecting a processor core from a selection pool based on a highest accumulated usage to perform the processor operation.

11. The method of claim 10 wherein:

if the processor operation does require reliability, then said selecting at least one selected processor core further comprises selecting a processor core based on a lowest accumulated usage to perform the processor operation.

12. The method of claim 1 wherein if the accumulated usage for a processor core of the at least one processor core is greater than or equal to an error detection usage threshold of the processor core, the performing includes performing the processor operation with error detection enabled for the processor core.

13. The method of claim 12 wherein if the accumulated usage for a processor core of the at least one processor core is less than the error detection usage threshold of the processor core, error detection is not enabled for the processor core in performing the processor operation.

14. The method of claim 1 further comprising:

if the accumulated usage of a processor core of the at least one selected processor core is greater than or equal to an error detection enabling limit of the processor core, then;

the performing the processor operation includes performing the processor operation with error detection logging enabled for the processor core; and

storing the error detection logging information associated with the processor core in a storage device in response to a change in error detection logging information for the processor core.

15. The method of claim 14 if the accumulated usage of the processor core is not greater than or equal to the error detection enabling limit of the processor core, then the performing the processor operation is performed without error detection logging being enabled for the processor core.

16. The method of claim 14 further comprising:

pairing the processor core to another processor core of the plurality to perform a subsequent processor operation based on the error detection logging information.

17. A data processor comprising:

a plurality of processor cores configured to perform data processing operations;

storage for accumulated usage information for each of the processor cores of the plurality of processor cores, wherein the accumulated usage information is indicative of accumulated usage of each processor core of the plurality of processor cores; and

a controller coupled to the plurality of processor cores and the storage and configured to select one or more selected processor cores from the plurality of processor cores to perform processor operations based on the accumulated usage information.

18. The data processor of claim 17 further comprising:

a second storage for lifetime limit values for each of the plurality of processor cores, wherein the lifetime limit is characterized as a total amount of accumulated usage that a processor core can reliably perform, and

the controller is coupled to the second storage and further configured select one or more selected processor cores from the plurality of processor cores to perform processor operations using the accumulated usage information and the lifetime limit values.

19. The data processor of claim 17 further comprising:

error detection circuitry configured to detect processing errors by the processor cores, and provide error information to the controller; and

the controller is further configured to selectively enable the error detection circuitry to detect a processing error by a processor core of the plurality of processor cores using the accumulated usage information for the processor core.

20. The data processor of claim 17 further comprising:

a second storage for reservation limit values for each of a reservation set of processor cores of the plurality of processor cores, wherein a reservation limit value for an associated processor core of the reservation set is characterized as a threshold amount of accumulated usage for the associated processor core beyond which the associated processor core will not be selected to perform the processor operation unless other processor cores of the plurality of processor cores not of the reservation set exceed an associated lifetime limit; and

the controller is coupled to the second storage and further configured to select one or more selected processor cores from the plurality of processor cores to perform processor operations based on the accumulated usage information and the reservation limit values.