Clock generation circuit and electronic apparatus
First Claim
1. A clock generation circuit, comprising:
- a current-controlled oscillation section including a plurality of delay circuits, which include a plurality of current-controlled delay circuits adapted to delay a signal by a delay amount corresponding to current supplied thereto, connected so as to form a closed loop and adapted to output a clock signal formed by said closed loop;
a phase controlling section including a comparator adapted to compare the clock signal with a reference signal and adapted to output controlling current, which varies so as to decrease the phase difference between the clock signal and the reference signal, to said current-controlled delay circuits; and
a spread current generation section adapted to supply spread spectrum current of a current value different from that of the controlling current in place of the controlling current to a particular one or ones of said current-controlled delay circuits.
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Accused Products
Abstract
Disclosed herein is a clock generation circuit, including a current-controlled oscillation section including a plurality of delay circuits, which include a plurality of current-controlled delay circuits adapted to delay a signal by a delay amount corresponding to current supplied thereto, connected so as to form a closed loop and adapted to output a clock signal formed by the closed loop; a phase controlling section including a comparator adapted to compare the clock signal with a reference signal and adapted to output controlling current, which varies so as to decrease the phase difference between the clock signal and the reference signal, to the current-controlled delay circuits; and a spread current generation section adapted to supply spread spectrum current of a current value different from that of the controlling current in place of the controlling current to a particular one or ones of the current-controlled delay circuits.
5 Citations
9 Claims
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1. A clock generation circuit, comprising:
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a current-controlled oscillation section including a plurality of delay circuits, which include a plurality of current-controlled delay circuits adapted to delay a signal by a delay amount corresponding to current supplied thereto, connected so as to form a closed loop and adapted to output a clock signal formed by said closed loop; a phase controlling section including a comparator adapted to compare the clock signal with a reference signal and adapted to output controlling current, which varies so as to decrease the phase difference between the clock signal and the reference signal, to said current-controlled delay circuits; and a spread current generation section adapted to supply spread spectrum current of a current value different from that of the controlling current in place of the controlling current to a particular one or ones of said current-controlled delay circuits. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An electronic apparatus, comprising:
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a clock generation circuit adapted to generate a clock signal having a phase synchronized with that of a reference signal; and an inputted section to which the clock signal is inputted; said clock generation circuit including a current-controlled oscillation section including a plurality of delay circuits, which include a plurality of current-controlled delay circuits adapted to delay a signal by a delay amount corresponding to current supplied thereto, connected so as to form a closed loop and adapted to output a clock signal formed by said closed loop, a phase controlling section including a comparator adapted to compare the clock signal with a reference signal and adapted to output controlling current, which varies so as to decrease the phase difference between the clock signal and the reference signal, to said current-controlled delay circuits, and a spread current generation section adapted to supply spread spectrum current of a current value different from that of the controlling current in place of the controlling current to a particular one or ones of said current-controlled delay circuits.
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Specification