DIGITAL TWO WAY AUTOMATIC COMMUNICATION SYSTEM (TWACS) OUTBOUND RECEIVER AND METHOD

• US 20120039400A1
• Filed: 08/08/2011
• Published: 02/16/2012
• Est. Priority Date: 08/13/2010
• Status: Active Grant

• Current Assignee: Aclara Technologies LLC (Hubbell, Inc.)
• Original Assignee: Aclara Power-Line Systems Incorporated (Hubbell, Inc.)
• Inventors: Rieken, David W.
• Granted Patent: US 8,928,170 B2
• Time in Patent Office: Days
• US Class Current: 375/257
• CPC Class Codes: H03L 7/08 Details of the phase-locked loop
• CPC Class Codes: H04B 2203/5416 by adding signals to the wave form of the power source
• CPC Class Codes: H04B 3/54 Systems for transmission via power distribution lines
• CPC Class Codes: H04L 2025/03356 Baseband transmission
• CPC Class Codes: H04L 2025/0377 during the reception of training signals
• CPC Class Codes: H04L 25/03159 operating in the frequency domain H04L25/03165, H04L25/03178 take precedence
• CPC Class Codes: H04L 7/033 using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15

Abstract

A receiver and method for a transponder of a two-way automatic communications system (TWACS) used by an electrical utility in which analog outbound messages are sent from the utility to a consumer and inbound, reply messages are sent from the consumer to the utility. The receiver and method enable a transponder to detect the outbound messages and include A/D conversion and digital processing for demodulating a digitized signal and providing the outbound message.

Claims

1. In a two-way automatic communications system (TWACS) used by an electrical utility in which outbound messages are sent from the utility to a consumer and inbound messages are sent from the consumer to the utility, the respective outbound and inbound messages being sent and received over the utility'"'"'s power distribution system, a receiver for detecting the outbound messages, said receiver comprising:

an analog filter component receiving the analog outbound signal including an outbound message to provide a filtered signal, an A/D converter converting the filtered signal to a corresponding digitized signal and providing the corresponding digitized signal; and

a digital processor executing;

a digital preprocessor component receiving the corresponding digitized signal, preprocessing the received corresponding digitized signal to provide a preprocessed digital signal; and

a digital symbol determination component receiving the preprocessed digital signal and digitally demodulating the received preprocessed digital signal to provide the outbound message.

2. The receiver of claim 1 wherein the filter component comprises:

a carrier notch filter receiving the analog outbound signal and canceling the carrier signal to provide an analog message signal; and

a low-pass filter (LPF) component receiving the analog outbound signal and filtering the analog outbound signal to provide a filtered analog outbound signal;

and wherein the A/D converter comprises;

a first A/D converter digitizing the analog message signal into a digitized message signal; and

a second A/D converter digitizing the filtered analog outbound signal and providing a digital filtered signal.

3. The receiver of claim 2 wherein the digital processor includes a buffering component comprising:

a buffer receiving the digitized message signal and sequentially providing a half-cycle buffered signal corresponding thereto, and

a phase locked loop (PLL) component receiving the digitized filtered signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle buffered signal to provide a corresponding digital signal.

4. The receiver of claim 3 wherein the digital preprocessor component comprises:

a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and

a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing a discretization signal corresponding to the digital signal with reduced resolution.

5. The receiver of claim 4 further comprising a finite impulse response (FIR) digital filter receiving the discretization signal from the dimension reduction component and filtering the discretization signal to provide the preprocessed digital signal wherein the dimension reduction component provides to the FIR filter only frequency bands with a signal-to-noise ratio (SNR) greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.

6. The receiver of claim 5 wherein the symbol determination component comprises:

a digital preamble detector for receiving the preprocessed digital signal and providing a symbol synchronization signal and a weight vector w corresponding to the preprocessed digital signal; and

a digital symbol estimator component for receiving the preprocessed digital signal and for receiving the weight vector w to provide a noise product signal y which is selectively sampled by the synchronization signal to provide the outbound message.

7. The receiver of claim 1 wherein the A/D converter is part of the digital processor and wherein the digital processor includes a buffering component buffering the digitized signal to sequentially provide a half-cycle signal, said buffering component including a phase locked loop (PLL) component including a phase detector, a digitally controlled oscillator (DCO) and a loop filter receiving the digitized signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle signal to provide a corresponding digital signal.

8. The receiver of claim 1 wherein the digital preprocessor component comprises:

a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and

a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing a discretization signal corresponding to the digital signal with reduced resolution.

9. The receiver of claim 8 further comprising a finite impulse response (FIR) digital filter receiving the discretization signal from the dimension reduction component and filtering the discretization signal to provide the preprocessed digital signal wherein the dimension reduction component provides to the FIR filter only frequency bands with a signal-to-noise ratio greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.

10. The receiver of claim 1 wherein the symbol determination component comprises:

a digital preamble detector for receiving the preprocessed digital signal and providing a symbol synchronization signal and a weight vector corresponding to the preprocessed digital signal; and

a digital symbol estimator component for receiving the preprocessed digital signal and for receiving the weight vector w to provide a noise product signal which is sampled according to the synchronization signal to provide the outbound message.

11. The receiver of claim 10 wherein the digital preamble detector comprises computer executable instructions on a tangible computer readable storage medium, said instructions executed by the digital processor, said instructions comprising:

a component to form a filtered preamble sequence;

a component for iteratively estimating received symbols and steering vectors;

a component for thresholding the estimated symbols; and

a component for comparing the resulting sequence to filtered preamble sequence wherein a detect indicator is set to 1 if there are fewer than a preset number of errors.

12. The receiver of claim 11 wherein adaptive equalization is implemented and further comprising estimating a noise covariance matrix for the adaptive equalization.

13. The receiver of claim 12 wherein the digital preprocessor component comprises:

a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and

a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing a discretization signal corresponding to the digital signal with reduced resolution.

14. A two-way automatic communications system (TWACS) used by an electrical utility comprising:

a substation sending analog outbound messages from the utility to a consumer;

a transponder sending inbound messages from the consumer to the utility, the respective outbound and inbound messages being sent and received over the utility'"'"'s power distribution system; and

a receiver included in the transponder for enabling the detection of the outbound messages, said receiver comprising;

an analog filter component receiving the analog outbound signal including an outbound message to provide a filtered signal,

an A/D converter converting the filtered signal to a corresponding digitized signal and providing the corresponding digitized signal; and

a digital processor executing;

a digital preprocessor component receiving the corresponding digitized signal, preprocessing the received corresponding digitized signal to provide a preprocessed digital signal; and

a digital symbol determination component receiving the preprocessed digital signal and digitally demodulating the received preprocessed digital signal to provide the outbound message.

15. The system of claim 14 wherein the filter component comprises:

a carrier notch filter receiving the analog outbound signal and canceling the carrier signal to provide an analog message signal; and

a low-pass filter (LPF) component receiving the analog outbound signal and filtering the analog outbound signal to provide a filtered analog outbound signal;

and wherein the A/D converter comprises;

a first A/D converter digitizing the analog message signal into a digitized message signal; and

a second A/D converter digitizing the filtered analog outbound signal and providing a digital filtered signal.

16. The system of claim 15 wherein the digital processor includes a buffering component comprising:

a buffer receiving the digitized message signal and sequentially providing a half-cycle buffered signal corresponding thereto, and

a phase locked loop (PLL) component receiving the digitized filtered signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle buffered signal to provide a corresponding digital signal.

17. The system of claim 16 wherein the digital preprocessor component comprises:

a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and

a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing a discretization signal corresponding to the digital signal with reduced resolution.

18. The system of claim 17 further comprising a finite impulse response (FIR) digital filter receiving the discretization signal from the dimension reduction component and filtering the discretization signal to provide the preprocessed digital signal wherein the dimension reduction component provides to the FIR filter only frequency bands with a signal-to-noise ratio (SNR) greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.

19. The system of claim 18 wherein the symbol determination component comprises:

a digital preamble detector component for receiving the preprocessed digital signal and providing a symbol synchronization signal and a weight vector w corresponding to the preprocessed digital signal; and

a digital symbol estimator component for receiving the preprocessed digital signal and for receiving the weight vector w to provide a noise product signal y which is selectively sampled by the synchronization signal to provide the outbound message.

20. In a two-way automatic communications system (TWACS) used by an electrical utility in which analog outbound messages are sent from the utility to a consumer and inbound messages are sent from the consumer to the utility, the respective outbound and inbound messages being sent and received over the utility'"'"'s power distribution system, a method for detecting the outbound messages comprising:

receiving the analog outbound signal including an outbound message;

converting the received analog outbound signal to a corresponding digitized signal;

preprocessing the corresponding digitized signal to provide a preprocessed digital signal; and

digitally demodulating the preprocessed digital signal to provide the outbound message).

21. The method of claim 20 wherein the receiving comprises:

filtering the analog outbound signal to cancel the carrier signal and provide an analog message signal; and

receiving the analog outbound signal) and filtering the analog outbound signal to provide a filtered analog outbound signal;

and wherein the converting comprises;

digitizing the analog message signal into a digitized message signal; and

digitizing the filtered analog outbound signal and providing a digital filtered signal.

22. The method of claim 21 wherein the preprocessing includes buffering comprising:

receiving the digitized message signal and sequentially providing a half-cycle buffered signal corresponding thereto, and

receiving by a phase locked loop the digitized filtered signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle buffered signal to provide a corresponding digital signal.

23. The method of claim 22 wherein the preprocessing comprises:

receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and

receiving the frequency domain signal and providing a discretization signal corresponding to the digital signal with reduced resolution.

24. The method of claim 23 further comprising a finite impulse response (FIR) digital filter receiving the discretization signal from the dimension reduction component and filtering the discretization signal to provide the preprocessed digital signal wherein the dimension reduction component provides to the FIR filter only frequency bands with a signal-to-noise ratio (SNR) greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.

25. The method of claim 24 wherein the demodulating comprises:

receiving the preprocessed digital signal and providing a symbol synchronization signal and a weight vector w corresponding to the preprocessed digital signal; and

receiving the preprocessed digital signal and receiving the weight vector to provide a noise product signal γ

which is selectively sampled by the synchronization signal to provide the outbound message.