CAPACITANCE TO CODE CONVERTER WITH SIGMA-DELTA MODULATOR

• US 20120043973A1
• Filed: 03/16/2011
• Published: 02/23/2012
• Est. Priority Date: 11/14/2006
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Kremin, Viktor
• Granted Patent: US 9,154,160 B2
• Time in Patent Office: Days
• US Class Current: 324/658
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: H03M 11/02 Details

Abstract

An apparatus and method of converting a capacitance measured on a sensor element to a digital value. The apparatus may include a switching capacitor as a sensor element, a modulation circuit coupled to the sensor element, and a switching circuit having a plurality of switches controlled by a variable-period clock. The modulation circuit is configured to measure a capacitance on the sense element and to convert the measured capacitance to a digital value.

Claims

1. A method, comprising:

measuring a capacitance on a sense element of a sensing device using a modulation circuit, wherein the sense element comprises a switching capacitor; and

switching the switching capacitor to be coupled and decoupled to a modulator capacitor of the modulation circuit using a plurality of switches, wherein the plurality of switches are controlled by a spread spectrum clock; and

converting the capacitance measured on the sense element to a digital value.

2. The method of claim 1, wherein said measuring comprises:

charging the capacitance on the sense element on a line coupled to a first node of the switching capacitor during a first phase of the plurality of switches; and

measuring the capacitance on the sense element on the line coupled to the one end of the switching capacitor using the modulation circuit during a second phase of the plurality of switches.

3. The method of claim 2, wherein said switching comprises:

coupling a voltage source to a first node of the switching capacitor using a first one of the plurality of switches for said charging during the first phase; and

coupling the first node of the switching capacitor to a first node of the modulator capacitor during the second phase.

4. The method of claim 2, wherein said switching comprises:

coupling a voltage source to a first node of the switching capacitor using a first one of the plurality of switches for said charging during a first phase; and

alternately coupling the first node of the switching capacitor and a discharge resistor to the first node of the modulator capacitor of the modulation circuit.

5. The method of claim 2, wherein said measuring further comprises discharging a voltage on the modulator capacitor when the voltage on the modulator capacitor reaches a reference voltage.

6. The method of claim 5, wherein discharging the voltage on the modulator capacitor comprises connecting a discharge resistor between the first node of the modulator capacitor and ground using a third switch of the plurality of switches controlled by an output signal of a comparator, wherein the comparator toggles the output signal when the voltage on the modulator capacitor crosses the reference voltage.

7. The method of claim 1, wherein said switching comprises switching the switching capacitor between a voltage source and a first node of the modulator capacitor of the modulation circuit using the plurality of switches.

8. The method of claim 1, wherein the digital value is commensurate to the measured capacitance.

9. An apparatus, comprising:

a sense element, wherein the sense element comprises a switching capacitor;

a modulation circuit coupled to the sense element; and

a switching circuit having a plurality of switches controlled by a variable-period clock, wherein the modulation circuit is configured to measure a capacitance on the sense element using the plurality of switches, and wherein the modulation circuit is configured to convert the measured capacitance to a digital value.

10. The apparatus of claim 9, further comprising a circuit configured to provide at least one of a pseudo-random clock or a dithered clock as the variable-period clock to control the switching circuit.

11. The apparatus of claim 10, wherein the PRS circuit comprises a PRS counter.

12. The apparatus of claim 9, further comprising:

an oscillator configured to provide an oscillator signal; and

a pseudo-random signal (PRS) circuit, comprising a PRS generator configured to receive the oscillator signal and to generate a PRS as the variable-period clock to control the switching circuit.

13. The apparatus of claim 9, further comprising a voltage-controlled oscillator (VCO) to provide the variable-period clock to control the switching circuit.

14. The apparatus of claim 9, further comprising a spread-spectrum clock circuit to provide the variable-period clock to control the switching circuit.

15. The apparatus of claim 9, wherein a first of the plurality of switches is coupled between a voltage source and a first node of the switching capacitor and a second of the plurality of switches is coupled between the first node of the switching capacitor and a first node of a modulator capacitor of the modulation circuit, wherein the switching circuit is configured to provide a charge current to the switching capacitor in a first phase using the first switch and to transfer charge on the sense element, accumulated during the first phase, to the modulator capacitor during a second phase using the second switch.

16. The apparatus of claim 9, wherein the modulation circuit comprises a sigma-delta modulator.

17. The apparatus of claim 9, further comprising one or more digital filters coupled to receive an output of the modulation circuit, wherein the output of the modulation circuit is a digital output bitstream, and wherein the one or more digital filters are configured to convert the digital output bitstream into the digital value.

18. A system, comprising:

a capacitance sense array comprising a plurality of sense elements, wherein each of the plurality of sense elements comprises a switching capacitor;

a processing device coupled to the capacitance sense array, the processing device comprising;

a switching circuit having a plurality of switches, wherein the processing device is configured to control the plurality of switches using a variable-period clock; and

a modulation circuit configured to be coupled to one of the plurality of sense elements, wherein the modulation circuit is configured to measure a capacitance on the respective sense element using the plurality of switches, and wherein the modulation circuit is configured to convert the measured capacitance to a digital value.

19. The system of claim 18, wherein the processing device further comprises a pseudo-random signal (PRS) circuit coupled to the switching circuit and the modulation circuit, wherein the PRS circuit is configured to provide a PRS as the variable-period clock to control the switching circuit.

20. The system of claim 18, wherein the modulation circuit is a capacitance-to-duty-cycle converter, wherein the modulator duty cycle of the modulation circuit changes when a presence of a conductive object is detected on the sense element.