Overvoltage and Overcurrent Protection Scheme

• US 20120044607A1
• Filed: 08/18/2010
• Published: 02/23/2012
• Est. Priority Date: 08/18/2010
• Status: Active Grant

• Current Assignee: Snap-On Incorporated
• Original Assignee: Snap-On Incorporated
• Inventors: Loewe, Thomas
• Granted Patent: US 8,390,974 B2
• Time in Patent Office: Days
• US Class Current: 361/91.1
• CPC Class Codes: H03K 17/0826 in bipolar transistor switches

Abstract

Disclosed are methods and corresponding systems to detect and prevent and/or eliminate overload conditions for a transistor. According to an embodiment, a method includes providing an input signal to a base terminal of a transistor for a first amount of time, determining if an overload condition exists at the transistor, disabling the transistor for a second amount of time when the overload condition exists at the transistor, and providing the communication signal to the base terminal upon expiration of the second amount of time. Additional overload conditions can be checked upon expiration of the second amount of time as well.

Claims

1. A method for protecting a transistor against overload, the method comprising:

providing an input signal to a base terminal of a transistor for a first amount of time;

upon expiration of the first amount of time, making a determination of whether an overload condition exists at the transistor;

disabling the transistor for a second amount of time when the determination is that an overload condition exists at the transistor; and

providing the input signal to the base terminal upon expiration of the second amount of time.

2. The method of claim 1, wherein making a determination of whether an overload condition exists at the transistor comprises making a determination of whether a voltage level at a collector terminal of the transistor exceeds a threshold collector voltage level.

3. The method of claim 2, further comprising:

determining whether a system voltage of a system that includes the transistor is above a threshold operating voltage level, wherein when the system voltage is above the threshold operating voltage level, the first amount of time comprises a first predetermined amount of time, and wherein when the system voltage is below the threshold operating voltage level, the first amount of time comprises a second predetermined amount of time.

4. The method of claim 1, wherein making a determination of whether an overload condition exists at the transistor comprises making a determination of whether an amount of current flowing through the transistor exceeds a threshold current level.

5. The method of claim 1, wherein making a determination of whether an overload condition exists at the transistor comprises making a determination of whether an amount of current flowing through the transistor is greater than a threshold current level just prior to a falling edge of a signal provided to the base terminal of the transistor.

6. The method of claim 1, further comprising:

upon expiration of a third amount of time, making a determination of whether an additional overload condition exists at the transistor;

disabling the transistor for a fourth amount of time when the determination is that an additional overload condition exists at the transistor; and

providing the input signal to the base terminal upon expiration of the fourth amount of time.

7. The method of claim 6, wherein making a determination of whether an overload condition exists at the transistor comprises making a determination of whether a voltage level at a collector terminal of the transistor exceeds a threshold collector voltage level, and wherein making a determination of whether an additional overload condition exists at the transistor comprises making a determination of whether an amount of current flowing through the transistor exceeds a threshold current level.

8. The method of claim 6, wherein making a determination of whether an additional overload condition exists at the transistor comprises making a determination of whether a current flowing through the transistor is greater than a threshold level at a time just prior to when a signal provided to the base terminal of the transistor transitions from high to low.

9. A circuit comprising:

a first signal line coupled to a collector terminal of a transistor;

an overload protection module coupled between a second signal line and a base terminal of the transistor, the overload protection module including;

means for applying a signal to the base terminal of a transistor for a first amount of time, the signal representative of a signal on the second signal line;

means for making a determination of whether an overload condition exists at the transistor upon expiration of the first amount of time;

means for disabling the transistor for a second amount of time when the determination is that an overload condition exists at the transistor; and

means for applying the signal to the base terminal upon expiration of the second amount of time.

10. The circuit of claim 9, further comprising:

a self-resetting fuse coupled between the first signal communication line and the collector terminal.

11. The circuit of claim 9, wherein the means for making a determination of whether an overload condition exists at the transistor comprises means for making a determination of whether a voltage level at the collector terminal of the transistor exceeds a threshold collector voltage level.

12. The circuit of claim 11, wherein the overload protection module further comprises:

means for determining a system voltage of the circuit is above a threshold operating voltage level, wherein when the system voltage is above a threshold operating voltage level, the first amount of time comprises a first predetermined amount of time, and wherein when the system voltage is below a threshold operating voltage level, the first amount of time comprises a second predetermined amount of time.

13. The circuit of claim 9, wherein the means for making a determination of whether an overload condition exists at the transistor comprises means for making a determination of whether an amount of current flowing through the transistor exceeds a threshold current level.

14. The circuit of claim 9, wherein the means for making a determination of whether an overload condition exists at the transistor comprises means for making a determination of whether an amount of current flowing through the transistor is greater than a threshold current level just prior to a time when a signal applied to the base terminal transitions from high to low.

15. The circuit of claim 9, wherein the overload protection module further includes:

means for making a determination, upon expiration of a third amount of time, of whether an additional overload condition exists at the transistor;

means for disabling the transistor for a fourth amount of time when the additional overload condition exists at the transistor; and

means for applying the signal on the second signal line to the base terminal upon expiration of the fourth amount of time.

16. The circuit of claim 15, wherein the means for making a determination of whether an overload condition exists at the transistor comprises means for making a determination of whether a voltage level at the collector terminal of the transistor has exceeded a threshold collector voltage level, and wherein the means for making a determination of whether an additional overload condition exists at the transistor comprises means for making a determination of whether an amount of current flowing through the transistor exceeds a threshold current level.

17. The circuit of claim 15, wherein the means for making a determination of whether an additional overload condition exists at the transistor comprises means for making a determination of whether a current flowing through the transistor is greater than a threshold current level just prior to a time when a signal applied to the base terminal transitions from high to low.

18. A field programmable gate array (FPGA) having an association of logic gates, wherein the logic gates are wired to perform functions, the functions comprising:

providing an input signal to a base terminal of a transistor for a first amount of time;

upon expiration of the first amount of time, making a determination of whether an overload condition exists at the transistor;

disabling the transistor for a second amount of time when the determination is that an overload condition exists at the transistor; and

providing the input signal to the base terminal upon expiration of the second amount of time.

19. The CRM of claim 18, wherein the functions further comprise:

upon expiration of a third amount of time, making a determination of whether an additional overload condition exists at the transistor;

disabling the transistor for a fourth amount of time when the determination is that an additional overload condition exists at the transistor; and

providing the communication signal to the base terminal upon expiration of the fourth amount of time.

20. The CRM of claim 18, wherein making a determination of whether an overload condition exists at the transistor comprises making a determination of whether a voltage level at a collector terminal of the transistor exceeds a threshold collector voltage level, and wherein making a determination of whether an additional overload condition exists at the transistor comprises making a determination of whether an amount of current flowing through the transistor exceeds a threshold current level.