MULTIPLE POWER-SUPPLY SIMULATION RESULT ANALYZER AND METHOD OF ANALYZING THE SAME

• US 20120046931A1
• Filed: 11/02/2011
• Published: 02/23/2012
• Est. Priority Date: 05/12/2009
• Status: Abandoned Application

• Current Assignee: Socionext Inc.
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Takahashi, Hiroshi, Honma, Shinsuke, Hayashi, Kazushi, Ike, Kazuyuki
• Application Number:
  US13/287,653
• Publication Number:
  US 20120046931A1
• Time in Patent Office: Days
• US Class Current: 703/15
• CPC Class Codes: G06F 2119/06 Power analysis or power optimisation
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

In a method of displaying a waveform of a simulation result, a waveform file extractor which extracts information of voltage values in addition to simulation times, values, and signal names input as waveform information, and a waveform display unit which enables a display of the wave information with the voltage values added are included. Thus, when a waveform of a multiple power-supply simulation is displayed on a display, voltage information is displayed together with the waveform, thereby allowing the voltage information to be analyzed together with a change in value at each simulation time. Thus, efficient analysis is achieved.

Claims

1. A simulation result analyzer for analyzing a simulation result provided by a simulator, comprising:

a waveform file extractor configured to extract waveform information of a logic simulation result, including voltage information, from the simulator;

a waveform display unit configured to receive the waveform information sent from the waveform file extractor, and to process data so that a waveform can be displayed on which a voltage value in the waveform information is represented by a color, and a logic value in the waveform information is represented by a numeric value or an amplitude of a wave; and

a display configured to display a waveform sent from the waveform display unit.

2. The simulation result analyzer of claim 1, further comprising:

a waveform file storage configured to store information from the waveform file extractor.

3. The simulation result analyzer of claim 1, comprising:

a circuit database generator configured to receive a hardware description language (HDL) file and a power supply information setting file used for simulation in the simulator, and to generate a circuit database including power supply information;

an HDL code display unit configured to receive the circuit database, and to process data so that an HDL code can be displayed; and

a circuit diagram display unit configured to receive the circuit database, and to process data so that a circuit diagram can be displayed,

wherein

the waveform file extractor extracts voltage information on each power island, and

the waveform display unit receives the logic simulation result and the voltage information from the waveform file extractor and the circuit database, and processes data so that the waveform can be displayed.

4. The simulation result analyzer of claim 3, wherein

the circuit database generator interprets and converts the HDL file and the power supply information setting file, and combines results based on instance information, thereby generates the circuit database in which circuit information, such as hierarchical structure information of the HDL file, is associated with power supply information described in the power supply information setting file.

5. The simulation result analyzer of claim 3, wherein

the HDL code display unit receives the circuit database, and uses a different color for each power island when displaying a code and a hierarchical structure of the HDL file.

6. The simulation result analyzer of claim 3, wherein

the circuit diagram display unit receives the circuit database, and uses a different color for each power island when displaying the circuit diagram.

7. The simulation result analyzer of claim 3, wherein

the waveform display unit receives the circuit database, and displays a signal driven by a clamp cell using a different color in a verification operation in which the clamp cell is virtually inserted.

8. The simulation result analyzer of claim 1, wherein

the simulation result analyzer analyzes the simulation result provided by the simulator and a power consumption measurement result provided by a power consumption measurement unit together, and

after extracting the waveform information of the logic simulation result from the simulator, the waveform file extractor extracts power consumption waveform information from the power consumption measurement unit after matching a start time and a time scale thereof to a start time and a time scale of the logic simulation, and extracts waveform information after aligning the simulation waveform information and the power consumption waveform information to a same time axis.

9. A method of analyzing a simulation result for analyzing and displaying a signal from a simulator, comprising:

extracting waveform information of a logic simulation result, including voltage information, from the simulator;

receiving the waveform information extracted in the extracting, and processing data so that a waveform can be displayed on which a voltage value in the waveform information is represented by a color, and a logic value in the waveform information is represented by a numeric value or an amplitude of a wave; and

displaying a waveform sent in the processing.

10. The method of analyzing a simulation result of claim 9, further comprising:

storing information extracted in the extracting.

11. The method of analyzing a simulation result of claim 9, comprising:

receiving an HDL file and a power supply information setting file used for simulation in the simulator, and generating a circuit database including power supply information;

receiving the circuit database, and processing data so that an HDL code can be displayed; and

receiving the circuit database, and processing data so that a circuit diagram can be displayed,

wherein

the extracting extracts voltage information on each power island, and

the receiving and processing data so that a waveform can be displayed receives the logic simulation result and the voltage information extracted in the extracting and the circuit database, and processes data so that the waveform can be displayed.

12. The method of analyzing a simulation result of claim 11, wherein

the receiving and generating interprets and converts the HDL file and the power supply information setting file, and combines results based on instance information, thereby generates the circuit database in which circuit information, such as hierarchical structure information of the HDL file, is associated with power supply information described in the power supply information setting file.

13. The method of analyzing a simulation result of claim 11, wherein

the receiving and processing data so that an HDL code can be displayed receives the circuit database, and uses a different color for each power island when displaying a code and a hierarchical structure of the HDL file.

14. The method of analyzing a simulation result of claim 11, wherein

the receiving and processing data so that a circuit diagram can be displayed receives the circuit database, and uses a different color for each power island when displaying a circuit diagram.

15. The method of analyzing a simulation result of claim 11, wherein

the receiving and processing data so that a waveform can be displayed receives the circuit database, and displays a signal driven by a clamp cell using a different color in a verification operation in which the clamp cell is virtually inserted.

16. The method of analyzing a simulation result of claim 9, wherein

the method of analyzing a simulation result is a method of analyzing the simulation result provided by the simulator and a power consumption measurement result provided by a power consumption measurement unit together, and

after extracting the waveform information of the logic simulation result from the simulator, the extracting extracts power consumption waveform information from the power consumption measurement unit after matching a start time and a time scale thereof to a start time and a time scale of the logic simulation, and extracts waveform information after aligning the simulation waveform information and the power consumption waveform information to a same time axis.