OPTOELECTRONIC DEVICE WITH LATERAL PIN OR PIN JUNCTION

• US 20120049242A1
• Filed: 04/21/2010
• Published: 03/01/2012
• Est. Priority Date: 04/21/2009
• Status: Active Grant

• Current Assignee: The Silanna Group Pty. Ltd
• Original Assignee: The Silanna Group Pty. Ltd
• Inventors: Atanackovic, Petar Branko, Duvall, Steven Grant
• Granted Patent: US 8,962,376 B2
• Time in Patent Office: Days
• US Class Current: 257/184
• CPC Class Codes: H01L 31/022441 Electrode arrangements specially adapted for back-contact solar cells
• CPC Class Codes: H01L 31/03921 including only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/047 PV cell arrays including PV cells having multiple vertical junctions or multiple V-groove junctions formed in a semiconductor substrate
• CPC Class Codes: H01L 31/0475 PV cell arrays made by cells in a planar, e.g. repetitive, configuration on a single semiconductor substrate; PV cell microarrays PV modules composed of a plurality of thin film solar cells deposited on the same substrate H01L31/046
• CPC Class Codes: H01L 31/0508 the interconnection means having a particular shape
• CPC Class Codes: H01L 31/056 the light-reflecting means being of the back surface reflector [BSR] type
• CPC Class Codes: H01L 31/068 the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• CPC Class Codes: H01L 31/0682 back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
• CPC Class Codes: H01L 31/075 the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/202 including only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/208 Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
• CPC Class Codes: Y02E 10/52 PV systems with concentrators
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

An optoelectronic device, including a semiconductor body having a surface to receive photons and a plurality of doped regions of opposite doping polarities, the doped regions extending substantially from the surface of the semiconductor body and into the semiconductor body, and being arranged in one or more pairs of opposite doping polarities such that each pair of doped regions forms a corresponding space charge region having a corresponding electric field therein, the space charge region extending substantially from the surface of the semiconductor body and into the semiconductor body such that photons entering the semiconductor body through the surface and travelling along paths within the space charge region generate electron-hole pairs in the space charge region that are separated in opposing directions substantially orthogonal to the photon paths by the electric field and collected by the corresponding pair of doped regions, thereby providing an electrical current to be conducted from the device.

Claims

1. An optoelectronic device, including a semiconductor body having a surface to receive photons and a plurality of doped regions of opposite doping polarities, the doped regions extending substantially from the surface of the semiconductor body and into the semiconductor body, and being arranged in one or more pairs of opposite doping polarities such that each pair of doped regions forms a corresponding space charge region having a corresponding electric field therein, the space charge region extending substantially from the surface of the semiconductor body and into the semiconductor body such that photons entering the semiconductor body through the surface and travelling along paths within the space charge region generate electron-hole pairs in the space charge region that are separated in opposing directions substantially orthogonal to the photon paths by the electric field and collected by the corresponding pair of doped regions, thereby providing an electrical current to be conducted from the device.

2. The device of claim 1, wherein each space charge region extends substantially from the surface of the semiconductor body such that electron-hole pairs created substantially at the surface of the semiconductor body by said photons are collected by the doped regions, thereby providing an electrical current to be conducted from the device.

3. The device of claim 1, wherein each space charge region extends deep into the semiconductor body such that a majority of electron-hole pairs generated in the semiconductor body by said photons are collected by the doped regions, thereby providing an electrical current to be conducted from the device.

4. The device of claim 1, wherein each space charge region extends through the semiconductor body so that substantially all of the electron-hole pairs generated in the semiconductor body by said photons are collected by the doped regions.

5. The device of claim 1, wherein the doped regions are arranged in a plurality of pairs of alternating doping polarities.

6. The device of claim 1, wherein each doped region has a lateral dimension parallel to a corresponding electric field of the doped region, the lateral dimension being such that minority carriers of electron-hole pairs generated anywhere in the doped region by photons can diffuse to a corresponding space charge region of the doped region to be collected and thereby contribute to the electrical current conducted from the device.

7. The device of claim 6, wherein the lateral dimension of each doped region is less than a diffusion length of the corresponding minority carrier.

8. The device of claim 7, wherein at least one lateral dimension of each doped region is such that a majority of the minority carriers of electron-hole pairs generated anywhere in the doped region by photons can diffuse to a corresponding space charge region of the doped region to be collected and thereby contribute to the electrical current to be conducted from the device.

9. The device of claim 6, wherein said doped regions are configured such that a majority of electron-hole pairs generated throughout the semiconductor body by photons can be collected and thereby provide an electrical current to be conducted from the device.

10. The device of claim 9, wherein said doped regions are configured such that substantially all of the electron-hole pairs generated throughout the semiconductor body by photons can be collected and thereby provide an electrical current to be conducted from the device.

11. The device of claim 1, wherein the electrical current is conducted from the doped regions through electrical contacts disposed on one or more surfaces of the semiconductor body other than the photon receiving surface.

12. The device of claim 1, including one or more optical components to redirect photons passing through the semiconductor body without being absorbed back into the semiconductor body to be absorbed therein.

13. The device of claim 12, wherein the one or more optical components include an electrically conductive interconnect configured to reflect and/or diffract photons passing through the semiconductor body back into the semiconductor body.

14. The device of claim 12, wherein the one or more optical components include a pseudo-random arrangement of at least three regions configured to reflect photons with respective phase differences.

15. The device of claim 12, wherein at least one of the one or more optically active components is configured to redirect photons passing through the semiconductor body back into the semiconductor body at an angle that provides a substantially longer path through the semiconductor body to thereby improve the likelihood of absorption therein.

16. The device of claim 1, wherein each space charge region is formed by substantially abutting p-type and n-type doped regions.

17. The device of claim 1, wherein regions of relatively high resistivity are disposed between respective pairs of said doped regions, the space charge regions including the regions of relatively high resistivity.

18. The device of claim 17, wherein the high resistivity regions of the semiconductor body include regions of respective different phases of the semiconductor having respective different bandgaps.

19. The device of claim 18, wherein regions having respective different bandgaps are arranged so that unabsorbed photons passing through one of the regions having a first bandgap enters another of the regions having a second bandgap to be absorbed therein.

20. The device of claim 1, wherein the semiconductor body is in the form of a thin film or wafer, the direction along which the doped regions extend into the semiconductor body being substantially orthogonal to the plane of the thin film or wafer.

21. The device of claim 20, wherein the semiconductor body is in the form of a thin film attached to an optically transparent and electrically insulating substrate and configured so that the photons pass through the substrate to enter the thin film through the photon receiving surface.

22. The device of claim 21, wherein the substrate is a sapphire substrate.

23. The device of claim 22, wherein the semiconductor body is a silicon layer epitaxially grown on the sapphire substrate and having a defective region extending from the interface between the silicon layer and the sapphire substrate due to lattice mismatch between the silicon and the sapphire, the silicon layer including a conductive layer disposed between the defective region and the space charge regions to electrically isolate the defective region from the space charge regions.

24. The device of claim 1, wherein the doped regions are formed as interdigitated fingers with regions of relatively high resistivity disposed between the doped fingers to provide the space charge regions.

25. The device of claim 1, wherein the doped regions are localised in plan view at the nodes of two two-dimensional arrays offset relative to one another so that the localised doped regions of one polarity can be contacted with a first set of linear parallel contacts and the localised doped regions of the opposite polarity can be contacted with a second set of linear parallel contacts, wherein the contacts of the first set are interleaved between the contacts of the second set.

26. The device of claim 1, wherein the doped regions are arranged in plan view as a two-dimensional array of mutually spaced doped regions of opposite doping polarities, wherein the doped regions of the array along each row or column of the array are of a corresponding doping polarity, consecutive rows or columns of the array are of alternating doping polarities, and the doped regions of the array along each diagonal of the array are of alternating doping polarities.

27. The device of claim 1, including a contact structure including interdigitated elongate contacts providing electrical contacts to the doped regions, the elongate interdigitated contacts including a first set of interconnected parallel elongate contacts providing electrical contacts to the doped regions of a first doping polarity, and a second set of interconnected parallel elongate contacts providing electrical contacts to the doped regions of a second doping polarity.

28. The device of claim 1, wherein each of the doped regions of at least one of the doping polarities is substantially rectangular in plan view, the longitudinal axis of each rectangular doped region being parallel with the longitudinal axis of a corresponding elongate electrical contact connected to the rectangular doped region to provide a larger contact area and thereby a lower series resistance, whilst allowing close spacing of the parallel elongate contacts.

29. The device of claim 1, wherein the semiconductor is silicon.

30. The device of claim 1, wherein the device is a photodiode or photovoltaic device.

32. The process of claim 30, including:

epitaxially growing the semiconductor body as a layer of single-crystal semiconductor on a single-crystal optically transparent substrate, the epitaxial growth producing structural defects in a region near the interface between the substrate and the semiconductor layer, the structural defects being of a type that would degrade the performance of optoelectronic devices formed in the semiconductor layer; and

implanting ions into the semiconductor layer to modify a buried portion of the semiconductor layer above or including the region containing the structural defects to substantially isolate the structural defects from the space charge regions formed above the modified portion.

33. The process of claim 32, wherein the implanting includes forming a buried conductive layer beneath the regions in which the space charge regions are formed.

34. The process of claim 32, wherein the implanting includes substantially removing the structural defects.

35. The process of claim 32, including:

cleaning a single-crystal optically transparent substrate;

epitaxially growing the semiconductor body as a layer of semiconductor on the single-crystal optically transparent substrate to form a thin film of substantially single-crystal semiconductor;

processing the grown layer of semiconductor to reduce the defect density near the interface between the semiconductor and the single-crystal optically transparent substrate; and

forming one or more optoelectronic devices in the thin film of substantially single-crystal semiconductor.

36. The process of claim 35, wherein the processing includes cleaning the single-crystal optically transparent substrate prior to the epitaxial growth by exposing the sapphire to an oxygen plasma.

31. An optoelectronic device manufacturing process, including:

forming a plurality of doped regions of opposite doping polarities in a semiconductor body, the doped regions extending substantially from a surface of the semiconductor body and into the semiconductor body, and being arranged in one or more pairs of opposite doping polarities such that each pair of doped regions forms a corresponding space charge region having a corresponding electric field therein, the space charge region extending substantially from the surface of the semiconductor body and into the semiconductor body such that photons entering the semiconductor body through the surface and travelling along paths within the space charge region generate electron-hole pairs in the space charge region that are separated in opposing directions substantially orthogonal to the photon paths by the electric field and collected by the corresponding pair of doped regions, thereby providing an electrical current to be conducted from the device.