COMPOSITE WAFER SEMICONDUCTOR
First Claim
1. A method of forming a composite wafer semiconductor, the method comprising:
- providing a first wafer, the first wafer having a first side and a second side, the second side being substantially opposite the first side;
providing a second wafer;
forming an isolation set on the first side of the first wafer;
etching the isolation set to create a free space in the isolation set;
bonding the second wafer to the isolation set;
forming a floating structure in the second wafer over the free space;
forming a surface mount pad on the second side of the first wafer; and
electrically coupling the floating structure to the surface mount pad using a through silicon via (TSV) conductor.
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Abstract
A composite wafer semiconductor device includes a first wafer and a second wafer. The first wafer has a first side and a second side, and the second side is substantially opposite the first side. The composite wafer semiconductor device also includes an isolation set is formed on the first side of the first wafer and a free space is etched in the isolation set. The second wafer is bonded to the isolation set. A floating structure, such as an inertia sensing device, is formed in the second wafer over the free space. In an embodiment, a surface mount pad is formed on the second side of the first wafer. Then, the floating structure is electrically coupled to the surface mount pad using a through silicon via (TSV) conductor.
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Citations
21 Claims
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1. A method of forming a composite wafer semiconductor, the method comprising:
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providing a first wafer, the first wafer having a first side and a second side, the second side being substantially opposite the first side; providing a second wafer; forming an isolation set on the first side of the first wafer; etching the isolation set to create a free space in the isolation set; bonding the second wafer to the isolation set; forming a floating structure in the second wafer over the free space; forming a surface mount pad on the second side of the first wafer; and electrically coupling the floating structure to the surface mount pad using a through silicon via (TSV) conductor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 10, 11, 12, 13, 14, 15, 17, 18, 19, 20, 21)
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9. A method of forming a composite wafer semiconductor, the method comprising:
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providing a first wafer and a second wafer; forming a patterned first conductor layer and a first isolation set on a first side of the first wafer; forming a patterned second conductor layer and a second isolation set on the first isolation set; etching the second isolation set to create a free space in the second isolation set over a portion of the first isolation set; bonding the second wafer to the second isolation set; forming a microelectromechanical system (MEMS) device in the second wafer over the free space; forming a first via conductor through the second wafer and through a portion of the second isolation set to the second conductor layer; forming a backside via from a second side of the first wafer to the first conductor layer; forming a backside isolation layer on the second side of the first wafer; and forming a backside via conductor in the backside via.
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16. A composite wafer semiconductor device comprising:
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a first wafer; a patterned first conductor layer and a first isolation set formed on a first side of the first wafer; a patterned second conductor layer and a second isolation set formed on the first isolation set; a free space etched in the second isolation set over a portion of the first isolation set; a second wafer bonded to the second isolation set; a microelectromechanical system (MEMS) device formed in the second wafer over the free space; a first via conductor formed through the second wafer and through a portion of the second isolation set to the second conductor layer; a backside via formed from a second side of the first wafer to the first conductor layer; a backside isolation layer formed on the second side of the first wafer; and a backside via conductor formed in the backside via.
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Specification