IMAGE SENSOR CHIP PACKAGE AND METHOD FOR FORMING THE SAME

• US 20120049307A1
• Filed: 08/25/2011
• Published: 03/01/2012
• Est. Priority Date: 08/26/2010
• Status: Active Grant

• Current Assignee: Xintec Incorporated
• Original Assignee: Xintec Incorporated
• Inventors: HUANG, Yu-Lung, HUNG, Tzu-Hsiang, HO, Yen-Shih
• Granted Patent: US 8,692,358 B2
• Time in Patent Office: Days
• US Class Current: 257/432
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 31/1876 Particular processes or apparatus for batch treatment of the devices

Abstract

A method for forming an image sensor chip package includes: providing a substrate having predetermined scribe lines defined thereon, wherein the predetermined scribe lines define device regions and each of the device regions has at least a device formed therein; disposing a support substrate on a first surface of the substrate; forming at least a spacer layer between the support substrate and the substrate, wherein the spacer layer covers the predetermined scribe lines; forming a package layer on a second surface of the substrate; forming conducting structures on the second surface of the substrate, wherein the conducting structures are electrically connected to the corresponding device in corresponding one of the device regions, respectively; and dicing along the predetermined scribe lines such that the support substrate is removed from the substrate and the substrate is separated into a plurality of individual image sensor chip packages.

Claims

1. A method for forming an image sensor chip package, comprising:

providing a substrate having a plurality of predetermined scribe lines defined thereon, wherein the predetermined scribe lines define a plurality of device regions in the substrate and each of the device regions has at least a device formed therein;

disposing a support substrate on a first surface of the substrate;

forming at least a spacer layer between the support substrate and the substrate, wherein the spacer layer covers the predetermined scribe lines;

forming a package layer on a second surface of the substrate;

forming a plurality of conducting structures on the second surface of the substrate, wherein the conducting structures are electrically connected to the corresponding device in corresponding one of the device regions, respectively; and

performing a dicing process including dicing the support substrate, the spacer layer, and the substrate along the predetermined scribe lines such that the support substrate is removed from the substrate and the substrate is separated into a plurality of individual image sensor chip packages.

2. The method for forming an image sensor chip package as claimed in claim 1, wherein the predetermined scribe lines comprise a plurality of first direction predetermined scribe lines substantially parallel to a first direction and a plurality of second direction predetermined scribe lines substantially parallel to a second direction, wherein the first direction is substantially perpendicular to the second direction.

3. The method for forming an image sensor chip package as claimed in claim 2, wherein the dicing process comprises:

dicing and removing a portion of the support substrate and a portion of the spacer layer covering the first direction predetermined scribe lines from a surface of the support substrate along the first direction predetermined scribe lines;

after the support substrate is partially diced and removed, forming a first fix layer on the surface of the support substrate; and

dicing and removing a portion of the first fix layer, a portion of the support substrate, and a portion of the spacer layer covering the second direction predetermined scribe lines from the surface of the support substrate along the second direction predetermined scribe lines such that the support substrate and the first fix layer are removed from the substrate.

4. The method for forming an image sensor chip package as claimed in claim 3, further comprising forming a second fix layer on the surface of the support substrate before the dicing process is performed.

5. The method for forming an image sensor chip package as claimed in claim 3, further comprising disposing a second support substrate on the second surface of the substrate before the dicing process is performed.

6. The method for forming an image sensor chip package as claimed in claim 5, wherein after the support substrate and the first fix layer are removed from the substrate, the method further comprises dicing and removing a portion of the substrate from the first surface of the substrate along the first direction predetermined scribe lines and the second direction predetermined scribe lines such that the substrate is separated into a plurality of individual image sensor chip packages.

7. The method for forming an image sensor chip package as claimed in claim 6, further comprising removing the second support substrate.

8. The method for forming an image sensor chip package as claimed in claim 7, wherein before the second support substrate is removed, the method further comprises attaching a film frame on the separated image sensor chip packages.

9. The method for forming an image sensor chip package as claimed in claim 1, further comprising thinning the substrate from the second surface of the substrate to a predetermined thickness before the conducting structures are formed.

10. The method for forming an image sensor chip package as claimed in claim 1, further comprising forming a plurality of through substrate conducting structures in the substrate, wherein the through substrate conducting structures electrically connect corresponding one of the devices and corresponding one of the conducting structures, respectively.

11. The method for forming an image sensor chip package as claimed in claim 1, further comprising respectively disposing an optical element on the devices in the device regions.

12. An image sensor chip package, comprising:

an image sensor chip having an upper surface and a lower surface and having a light sensing device disposed at the upper surface;

an optical element disposed on the light sensing device, wherein the optical element has a light receiving surface;

a conducting layer extending from the lower surface towards the upper surface of the image sensor chip and electrically connected to the light sensing device; and

a package layer formed on the lower surface of the image sensor chip and the conducting layer, wherein a shortest distance between the light receiving surface and a bottom surface of the package layer is not larger than about 130 μ

m.

13. The image sensor chip package as claimed in claim 12, wherein no support substrate is disposed on the light receiving surface of the optical element.

14. The image sensor chip package as claimed in claim 12, wherein the optical element comprises a microlens.

15. The image sensor chip package as claimed in claim 12, further comprising at least a solder ball disposed on the lower surface of the image sensor chip and electrically connected to the conducting layer.

16. The image sensor chip package as claimed in claim 12, further comprising a hole extending from the lower surface towards the upper surface of the image sensor chip, wherein a portion of the conducting layer is located in the hole.

17. An image sensor chip package, comprising:

an image sensor chip having an upper surface and a lower surface and having a light sensing device disposed at the upper surface;

an optical element disposed on the light sensing device, wherein the optical element has a light receiving surface;

a conducting layer extending from the lower surface towards the upper surface of the image sensor chip and electrically connected to the light sensing device; and

a package layer formed on the lower surface of the image sensor chip and the conducting layer, wherein no support substrate is disposed on the light receiving surface.

18. The image sensor chip package as claimed in claim 17, further comprising a hole extending from the lower surface towards the upper surface of the image sensor chip, wherein a portion of the conducting layer is located in the hole.