SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20120049318A1
• Filed: 08/11/2011
• Published: 03/01/2012
• Est. Priority Date: 08/30/2010
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Nitta, Tetsuya, Kawamata, Tatsuya, Tachigami, Atsushi, Horie, Kazuya, Shiromoto, Tatsuya, Shimizu, Hironori
• Granted Patent: US 8,710,619 B2
• Time in Patent Office: Days
• US Class Current: 257/508
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence
• CPC Class Codes: H01L 21/76283 Lateral isolation by refilling of trenches with dielectric material
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

To provide, in a semiconductor device formed on an SOI substrate and having a semiconductor layer of the SOI substrate surrounded, at the periphery of the element region thereof, with element isolation, a technology capable of preventing reliability deterioration attributed to the element isolation. Appearance of a hollow, which is formed upon filling of a deep trench with an insulating film, from the upper surface of the insulating film can be prevented by setting the trench width of the upper portion of the deep trench configuring trench isolation at less than 1.2 μm. Reduction in the breakdown voltage between adjacent element regions which may presumably occur due to a decrease in the trench width of the upper portion of the deep trench can be prevented by forming, on the upper portion of the deep trench, an LOCOS insulating film coupled to the insulating film filled in the deep trench.

Claims

1. A semiconductor device, comprising:

an SOI substrate having a support substrate, a BOX layer formed over the main surface of the support substrate and made of an insulator, and an active layer formed over the upper surface of the BOX layer;

an LOCOS insulating film formed over the upper surface of the active layer and annularly surrounding an element region in a planar view;

a deep trench annularly surrounding the element region in a planar view, formed continuously in a portion of the LOCOS insulating film and the active layer therebelow, and reaching the BOX layer; and

an insulating film filled in the deep trench,

wherein the trench width of the deep trench formed in the portion of the LOCOS insulating film is smaller than the trench width of the deep trench formed in the active layer.

2. The semiconductor device according to claim 1,

wherein the trench width of the deep trench formed in the portion of the LOCOS insulating film is smaller than 1.2 μ

m.

3. The semiconductor device according to claim 1,

wherein the insulating film also functions as an interlayer insulating film covering therewith a semiconductor element formed in the element region.

4. The semiconductor device according to claim 1,

wherein the deep trench widens toward the bottom thereof.

5. A semiconductor device, comprising:

an SOI substrate having a support substrate, a BOX layer formed over the main surface of the support substrate and made of an insulator, and an active layer formed over the upper surface the BOX layer;

an LOCOS insulating film formed over the upper surface of the active layer and annularly surrounding an element region in a planar view;

a deep trench annularly surrounding the element region in a planar view, formed continuously in a portion of the LOCOS insulating film and the active layer therebelow, and reaching the BOX layer;

a first insulating film filled in the deep trench and at the same time, functioning as an interlayer insulating film covering a semiconductor element formed in the element region;

a second insulating film formed over the first insulating film;

a contact hole penetrating through the first insulating film and the second insulating film and reaching the element region;

a plug having a conductive substance filled in the contact hole; and

a metal wiring to be coupled to the upper surface of the plug.

6. The semiconductor device according to claim 5,

wherein the trench width of the deep trench formed in the portion of the LOCOS insulating film is smaller than the trench width of the deep trench formed in the active layer.

7. The semiconductor device according to claim 5,

wherein the deep trench widens toward the bottom thereof.

8. A semiconductor device, comprising:

an SOI substrate having a support substrate, a BOX layer formed over the main surface of the support substrate and comprising an insulator, and an active layer formed over the upper surface of the BOX layer;

a first deep trench formed, in the active layer between a first element region and a second element region placed adjacent to each other in a second direction, along a first direction perpendicular to the second direction in a planar view and reaching the BOX layer; and

a second deep trench formed in the active layer along the second direction in a planar view and reaching the BOX layer,

wherein in a T-shaped portion in which the end portion of the first deep trench is coupled to the second deep trench, the side surface of the second deep trench opposite to the first element region and the second element region has a wedge-shaped depression toward the first deep trench in a planar view.

9. The semiconductor device according to claim 8,

wherein the trench width of the T-shaped portion in a diagonal direction is equal to or smaller than the trench width of the first deep trench or the second deep trench.

10. The semiconductor device according to claim 8,

wherein the first deep trench and the second deep trench are each filled with an insulating film, and

wherein the insulating film also functions as an interlayer insulating film covering therewith a semiconductor element.

11. The semiconductor device according to claim 8,

wherein the first deep trench and the second deep trench are continuously formed in a portion of the LOCOS insulating film formed over the upper surface of the active layer and the active layer lying below the LOCOS insulating film and reach the BOX layer.

12. The semiconductor device according to claim 11,

wherein the trench widths of the first deep trench and the second deep trench formed in the portion of the LOCOS insulating film are smaller than the trench widths of the first deep trench and the second deep trench formed in the active layer.

13. The semiconductor device according to claim 8,

wherein the first deep trench and the second deep trench each widens toward the bottom thereof.

14. A method for manufacturing a semiconductor device, comprising the steps of:

(a) preparing an SOI substrate having a support substrate, a BOX layer formed over the main surface of the support substrate and comprising an insulator, and an active layer formed over the upper surface of the BOX layer;

(b) forming, over the upper surface of the active layer, an LOCOS insulating film which annularly surrounds an element region in a planar view;

(c) forming a semiconductor element over the active layer in the element region;

(d) depositing, over the upper surface of the active layer, a first insulating film covering the semiconductor element;

(e) by dry etching with a resist pattern as a mask, etching the first insulating film which is over the LOCOS insulating film and at the same time, in a predetermined region annularly surrounding the element region in a planar view;

(f) removing the resist pattern;

(g) by anisotropic dry etching with the first insulating film as a mask, successively etching the LOCOS insulating film and the active layer to form a deep trench which annularly surrounds the element region in a planar view and reaches the BOX layer;

(h) etching the side surface of the deep trench formed in the active layer by isotropic etching to increase the trench width of the deep trench formed in the active layer than the trench width of the deep trench formed in the LOCOS insulating film;

(i) depositing a second insulating film in the deep trench and over the first insulating film; and

(j) planarizing the upper surface of the second insulating film.

15. The method for manufacturing a semiconductor device according to claim 14,

wherein an SF₆ gas is used in the anisotropic dry etching of the active layer in the step (g).

16. The method for manufacturing a semiconductor device according to claim 14,

wherein a fluorocarbon-based gas is used in the isotropic etching in the step (h).

17. The method for manufacturing a semiconductor device according to claim 14,

wherein the second insulating film is a BPSG film formed using thermal CVD.

18. The method for manufacturing a semiconductor device according to claim 14,

wherein the trench width of the deep trench formed in the step (g) is smaller than 1.2 μ

m.

19. A method for manufacturing a semiconductor device, comprising the steps of:

(a) preparing an SOI substrate having a support substrate, a BOX layer formed over the main surface of the support substrate and comprising an insulator, and an active layer formed over the upper surface of the BOX layer;

(b) forming, over the upper surface of the active layer, an LOCOS insulating film which annularly surrounds an element region in a planar view;

(c) forming a semiconductor element over the active layer in the element region;

(d) depositing, over the upper surface of the active layer, a first insulating film covering the semiconductor element;

(e) by dry etching with a resist pattern as a mask, etching the first insulating film which is over the LOCOS insulating film and at the same time, in a predetermined region annularly surrounding the element region in a planar view;

(f) removing the resist pattern;

(g) by anisotropic dry etching with the first insulating film as a mask, successively etching the LOCOS insulating film and the active layer to form a deep trench which annularly surrounds the element region in a planar view and reaches the BOX layer;

(h) depositing a second insulating film in the deep trench and over the first insulating film;

(i) planarizing the upper surface of the second insulating film;

(j) depositing a third insulating film over the second insulating film;

(k) forming a contact hole penetrating through the third insulating film and the second insulating film and reaching the element region;

(l) filling a conductive substance in the contact hole to form a plug; and

(m) forming over the third insulating film a metal wiring contiguous to the upper surface of the plug.

20. The method for manufacturing a semiconductor device according to claim 19, further comprising, between the step (g) and step (h), a step of:

(n) carrying out isotropic etching of the side surface of the deep trench formed in the active layer to make the trench width of the deep trench formed in the active layer greater than the trench width of the deep trench formed in the LOCOS insulating film.

21. The method for manufacturing a semiconductor device according to claim 19,

wherein the second insulating film is a BPSG film formed using thermal CVD and the third insulating film is a TEOS film formed using plasma CVD.