THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING SAME, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING THE SAME

• US 20120058601A1
• Filed: 11/10/2011
• Published: 03/08/2012
• Est. Priority Date: 11/19/2008
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Ueda, Tomomasa, Nakano, Shintaro, Uchikoga, Shuichi, Saito, Nobuyoshi
• Granted Patent: US 8,679,904 B2
• Time in Patent Office: Days
• US Class Current: 438/104
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]

Abstract

A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; source and drain electrodes provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source and drain electrodes above the gate electrode.

Claims

1. A method for manufacturing a thin film transistor,

the thin film transistor including:

a substrate;

a gate electrode provided on the substrate;

a gate insulating film provided on the gate electrode;

a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide;

a source electrode and a drain electrode provided on the semiconductor layer, the source electrode being opposed to one end of the gate electrode, the drain electrode being opposed to another end of the gate electrode, the another end being opposite to the one end, the drain electrode being apart from the source electrode; and

a channel protecting layer including a first portion provided between the source electrode and the semiconductor layer, and a second portion provided between the drain electrode and the semiconductor layer,

the method comprising;

forming the gate electrode on the substrate;

forming the gate insulating film on the gate electrode;

forming the semiconductor layer on the gate insulating film;

forming the channel protecting layer covering at least a part of a side face of the semiconductor layer above the gate electrode;

performing a heat treatment on the semiconductor layer and the channel protecting layer at a temperature not less than 160°

C.; and

forming the source electrode and the drain electrode on the semiconductor layer and the channel protecting layer after the performing the heat treatment.

2. The method according to claim 1, wherein the channel protecting layer is formed covering at least the part of the side face of the semiconductor layer between a first extension line of a first side of a first region and a second extension line of a second side of a second region, the source electrode being formed in the first region, the drain electrode being formed in the second region, the first side being opposed to the second region, the second region being opposed to the first region.

3. The method according to claim 2, wherein the channel protecting layer further covers an upper face of the semiconductor layer between the extension line of the side of the source electrode opposed to the drain electrode and the extension line of the side of the drain electrode opposed to the source electrode.

4. The method according to claim 1, wherein the channel protecting layer contains oxygen.

5. The method according to claim 1, wherein the semiconductor layer includes an amorphous oxide which contains Zn.

6. The method according to claim 5, wherein the amorphous oxide further contains at least one of In and Ga.

7. A method for manufacturing a display device,

the display device including:

a thin film transistor including;

a substrate;

a gate electrode provided on the substrate;

a gate insulating film provided on the gate electrode;

a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide;

a source electrode and a drain electrode provided on the semiconductor layer, the source electrode being opposed to one end of the gate electrode, the drain electrode being opposed to another end of the gate electrode, the another end being opposite to the one end, the drain electrode being apart from the source electrode; and

a channel protecting layer including a first portion provided between the source electrode and the semiconductor layer, and a second portion provided between the drain electrode and the semiconductor layer;

a pixel electrode connected to one of the source electrode and the drain electrode; and

an optical element producing at least one of a change in optical characteristics and light emission by an electric signal provided to the pixel electrode,

the method comprising;

forming the gate electrode on the substrate;

forming the gate insulating film on the gate electrode;

forming a layer of the oxide on the gate insulating film;

forming the channel protecting layer covering at least a part of a side face of the layer of the oxide above the gate electrode and exposing the layer of the oxide in a third region, the pixel electrode being formed in the third region;

performing a heat treatment on the layer of the oxide and the channel protecting layer at a temperature not less than 160°

C. to decrease an electric resistance of the layer of the oxide not covered with the channel protecting layer to form the pixel electrode; and

forming the source electrode and the drain electrode on the semiconductor layer and the channel protecting layer after the performing the heat treatment.

8. The method according to claim 7, further comprising:

performing a surface processing selectively changing smoothness of a surface of the gate insulating film before the forming the layer of the oxide.

9. The method according to claim 8, wherein the performing the surface processing includes making the surface of the gate insulating film in the third region rougher than a surface of the gate insulating film in a region except the third region.

10. The method according to claim 7, wherein the channel protecting layer contains oxygen.

11. The method according to claim 7, wherein the semiconductor layer includes an amorphous oxide which contains Zn.

12. The method according to claim 11, wherein the amorphous oxide further contains at least one of In and Ga.

13. A method for manufacturing a display device,

the display device including:

a thin film transistor including;

a substrate;

a gate electrode provided on the substrate;

a gate insulating film provided on the gate electrode;

a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide;

a source electrode and a drain electrode provided on the semiconductor layer, the source electrode being opposed to one end of the gate electrode, the drain electrode being opposed to another end of the gate electrode, the another end being opposite to the one end, the drain electrode being apart from the source electrode; and

a channel protecting layer including a first portion provided between the source electrode and the semiconductor layer, and a second portion provided between the drain electrode and the semiconductor layer;

a pixel electrode connected to one of the source electrode and the drain electrode; and

an optical element producing at least one of a change in optical characteristics and light emission by an electric signal provided to the pixel electrode,

the method comprising;

forming the gate electrode on the substrate;

forming the gate insulating film on the gate electrode;

performing surface processing selectively changing smoothness of a surface of the gate insulating film; and

forming a layer of the oxide on the gate insulating film.

14. The method according to claim 13, wherein the channel protecting layer is formed covering at least the part of the side face of the semiconductor layer between a first extension line of a first side of a first region and a second extension line of a second side of a second region, the source electrode being formed in the first region, the drain electrode being formed in the second region, the first side being opposed to the second region, the second region being opposed to the first region.

15. The method according to claim 14, wherein the channel protecting layer further covers an upper face of the semiconductor layer between the extension line of the side of the source electrode opposed to the drain electrode and the extension line of the side of the drain electrode opposed to the source electrode.

16. The method according to claim 13, wherein the channel protecting layer contains oxygen.

17. The method according to claim 13, wherein the semiconductor layer includes an amorphous oxide which contains Zn.

18. The method according to claim 17, wherein the amorphous oxide further contains at least one of In and Ga.