SEMICONDUCTOR DEVICE

• US 20120061724A1
• Filed: 09/14/2011
• Published: 03/15/2012
• Est. Priority Date: 09/15/2010
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: OGURA, Tsuneo
• Granted Patent: US 9,029,918 B2
• Time in Patent Office: Days
• US Class Current: 257/139
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42356 Disposition, e.g. buried gate electrode H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7805 in antiparallel, e.g. freewheel diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7831 with multiple gate structure FinFETs or MuGFETs H01L29/7855, thin film transistors H01L29/78645

Abstract

According to one embodiment, a semiconductor device includes a first major electrode, a first semiconductor layer, a first conductivity-type base layer, a second conductivity-type base layer, a second semiconductor layer, a buried layer, a buried electrode, a gate insulating film, a gate electrode, and a second major electrode. The buried layer of the second conductivity type selectively is provided in the first conductivity-type base layer. The buried electrode is provided in a bottom portion of a trench which penetrates the second conductivity-type base layer to reach the buried layer. The buried electrode is in contact with the buried layer. The gate electrode is provided inside the gate insulating film in the trench. The second major electrode is provided on the second semiconductor layer and is electrically connected to the second semiconductor layer and the buried electrode.

Claims

1. A semiconductor device, comprising:

a first major electrode;

a first semiconductor layer provided on the first major electrode;

a first conductivity-type base layer provided on the first semiconductor layer;

a second conductivity-type base layer provided on the first conductivity-type base layer;

a second semiconductor layer of the first conductivity type provided on the second conductivity-type base layer;

a buried layer of the second conductivity type selectively provided in the first conductivity-type base layer;

a buried electrode provided in a bottom portion of a trench which penetrates the second conductivity-type base layer to reach the buried layer, the buried electrode being in contact with the buried layer;

a gate insulating film provided on a side wall of the trench at a portion above the buried electrode;

a gate electrode provided inside the gate insulating film in the trench; and

a second major electrode provided on the second semiconductor layer and being electrically connected to the second semiconductor layer and the buried electrode.

2. The device according to claim 1, wherein an insulating film is provided between the gate electrode and the buried electrode in the trench.

3. The device according to claim 1, wherein the buried layer is in contact with a bottom face and a side face of the buried electrode.

4. The device according to claim 1, wherein the buried electrode is a semiconductor containing an impurity and having conductivity.

5. The device according to claim 1, wherein the first semiconductor layer is a drain layer of the first conductivity type.

6. The device according to claim 1, wherein the first semiconductor layer is a collector layer of the second conductivity type.

7. The device according to claim 1, wherein the second semiconductor layer is provided in a striped planar pattern overlapped on the second conductivity-type base layer with a same width as the second conductivity-type base layer.

14. The device according to claim 3, wherein the buried layer is in contact with a bottom face and a side face of the buried electrode.

8. A semiconductor device, comprising:

a first major electrode;

a first semiconductor layer provided on the first major electrode;

a first conductivity-type base layer provided on the first semiconductor layer;

a second conductivity-type base layer provided on the first conductivity-type base layer;

a second semiconductor layer of the first conductivity type provided on the second conductivity-type base layer;

a gate insulating film provided on a side wall of a first trench which penetrates the second conductivity-type base layer to reach the first conductivity-type base layer;

a gate electrode provided inside the gate insulating film in the first trench;

a buried layer of the second conductivity type selectively provided in the first conductivity-type base layer;

a buried electrode provided in a second trench which penetrates the second conductivity-type base layer to reach the buried layer, the buried electrode being in contact with the buried layer; and

a second major electrode provided on the second semiconductor layer and being electrically connected to the second semiconductor layer and the buried electrode.

9. The device according to claim 8, wherein:

the buried electrode is provided in a bottom portion of the second trench; and

a second gate electrode is provided on the buried electrode in the second trench via an insulating film, and is electrically connected to the gate electrode.

10. The device according to claim 8, wherein:

the buried electrode is filled in the second trench from the bottom portion to an opening; and

the second major electrode is provided also on the second trench so as to be in contact with an upper end of the buried electrode filled in the second trench.

11. The device according to claim 10, wherein the second conductivity-type base layer is in contact with a side face of the buried electrode.

12. The device according to claim 8, wherein the second trench is deeper than the first trench.

13. The device according to claim 12, wherein the buried layer is in contact, with the bottom portion of the buried electrode at a deeper position than the first trench.

15. The device according to claim 8, wherein the buried electrode is a semiconductor containing an impurity and having conductivity.

16. The device according to claim 8, wherein the first semiconductor layer is a drain layer of the first conductivity type.

17. The device according to claim 8, wherein the first semiconductor layer is a collector layer of the second conductivity type.

18. The device according to claim 8, wherein the second semiconductor layer is provided in a striped planar pattern overlapped on the second conductivity-type base layer with a same width as the second conductivity-type base layer.