SEMICONDUCTOR COMPONENT AND DEVICE PROVIDED WITH HEAT DISSIPATION MEANS

• US 20120061849A1
• Filed: 09/12/2011
• Published: 03/15/2012
• Est. Priority Date: 09/13/2010
• Status: Active Grant

• Current Assignee: STMicroelectronics SAS (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SAS (STMicroelectronics NV)
• Inventors: Coffy, Romain, Guillou, Yann
• Granted Patent: US 8,928,148 B2
• Time in Patent Office: Days
• US Class Current: 257/774
• CPC Class Codes: H01L 2224/02377 Fan-in arrangement
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/13022 the bump connector being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/14519 including bump connectors providing primarily thermal dissipation
• CPC Class Codes: H01L 2224/17519 including bump connectors providing primarily thermal dissipation
• CPC Class Codes: H01L 2224/2518 being disposed on at least two different sides of the body, e.g. dual array
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/73267 : Layer and HDI connectors
• CPC Class Codes: H01L 2225/0651 : Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06568 : the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 2225/1035 : the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 2225/1094 : Thermal management, e.g. cooling
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/3135 : Double encapsulation or coating and encapsulation
• CPC Class Codes: H01L 23/36 : Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/42 : Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
• CPC Class Codes: H01L 23/49827 : Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/5389 : the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/14 : of a plurality of bump connectors
• CPC Class Codes: H01L 24/19 : Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 : Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15173 : in a single layer of the multilayer substrate
• CPC Class Codes: H01L 2924/15183 : in a single layer of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/157 : with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A first component includes a slice formed from an integrated circuit chip having a front face and a rear face. An encapsulation block encapsulates the integrated circuit chip such that front and rear faces of the chip and front and rear faces of the encapsulation block are co-planar to form front and rear faces of the slice. Front and rear electrical connection networks are provided on the front and rear faces, respectively, with the electrical connection networks linked by electrical connection vias passing through the encapsulation block. A thermal transfer layer at least partially covers the rear face. A second component may be behind and at a distance from the first component. Connection elements interposed between the first component and the second component include both thermal connection elements in contact with the thermal transfer layer and electrical connection elements interconnecting the first and second components.

Claims

1. A semiconductor component, comprising:

a slice comprising at least one integrated circuit chip that has a front electrical connection face and a rear face, the slice further including an encapsulation block in which the at least one integrated circuit chip is peripherally embedded, such that the front and rear faces of the chip and front and rear faces of the encapsulation block are co-planar to form front and rear faces of the slice;

a front electrical connection network on the front face of the slice and a rear electrical connection network on the rear face of the slice, the front and rear electrical connection networks linked by electrical connection vias extending through said encapsulation block; and

a thermal transfer layer at least partially covering the rear face of the chip.

2. The component according to claim 1, further comprising rear connection elements including first rear elements placed on the thermal transfer layer and second rear elements linked to the rear electrical connection network.

3. The component according to claim 1, further comprising front connection elements including first front elements linked to the front electrical connection network and second front elements that are not linked to the front electrical connection network.

4. The component according to claim 1, wherein the rear electrical connection network and the thermal transfer layer extend in a same metallic level.

5. A semiconductor device, comprising:

a first component comprising;

a slice including at least one first integrated circuit chip that has a front electrical connection face and a rear face, the slice further including an encapsulation block in which the first integrated circuit chip is peripherally embedded, such that the front and rear faces of the first integrated circuit chip and the front and rear faces of the encapsulation block are co-planar to form front and rear faces of the slice, and

a metallic thermal transfer layer at least partially covering the rear face of the chip;

a second component situated behind and at a distance from the first component; and

a plurality of connection elements interposed between the first component and the second component, the connection elements including;

thermal connection elements in contact with the metallic thermal transfer layer of the first component; and

electrical connection elements configured to form at least part of an electrical connection between the front electrical connection face of the first integrated circuit chip and the second component.

6. The device according to claim 5, wherein the first component comprises a front electrical connection network on the front face of the slice and a rear electrical connection network on the rear face of the slice, the front and rear electrical connection networks linked by electrical connection vias extending through said encapsulation block;

and

wherein the second component comprises a front electrical connection network linked to the rear electrical connection network of the first component via said second connection elements.

7. The device according to claim 5, wherein the second component comprises at least one second integrated circuit chip and thermal connection vias extending between said first thermal connection elements and the at least one second integrated circuit chip.

8. The device according to claim 5, wherein the second component comprises at least one second integrated circuit chip having a rear face is at least partially covered by a metallic rear layer.

9. The device according to claim 8, wherein the second component further comprises an external thermal block extending at least partially over said metallic rear layer.

10. The device according to claim 9, wherein the external thermal block extends over the rear face of the second component and has a lateral part which extends surrounding sides of the second component.

11. The device according to claim 10, wherein the lateral part of the external thermal block is in thermal contact with a peripheral part of the rear face of the first component.

12. The device according to claim 11, wherein the first component comprises a front electrical connection network on the front face of the slice and a rear electrical connection network on the rear face of the slice, the front and rear electrical connection networks linked by electrical connection vias extending through said encapsulation block;

and

wherein said peripheral part of the rear face of the first component comprises one of;

metallic portions of the rear electrical connection network, or lateral extensions of the metallic thermal transfer layer.

13. Apparatus, comprising:

an external wall; and

a semiconductor component, comprising;

a slice comprising at least one integrated circuit chip that has a front electrical connection face and a rear face, the slice further including an encapsulation block in which the at least one integrated circuit chip is peripherally embedded, such that the front and rear faces of the chip and front and rear faces of the encapsulation block are co-planar to form front and rear faces of the slice;

a front electrical connection network on the front face of the slice and a rear electrical connection network on the rear face of the slice, the front and rear electrical connection networks linked by electrical connection vias extending through said encapsulation block; and

a thermal transfer layer at least partially covering the rear face of the chip;

wherein said thermal transfer layer is thermally linked to the wall of the apparatus via a thermal block made of a thermal conducting foam.

14. Apparatus, comprising:

an external wall; and

a semiconductor device, comprising;

a first component comprising;

a slice including at least one first integrated circuit chip that has a front electrical connection face and a rear face, the slice further including an encapsulation block in which the first integrated circuit chip is peripherally embedded, such that the front and rear faces of the first integrated circuit chip and the front and rear faces of the encapsulation block are co-planar to form front and rear faces of the slice, and

a metallic thermal transfer layer at least partially covering the rear face of the chip;

a second component situated behind and at a distance from the first component; and

a plurality of connection elements interposed between the first component and the second component, the connection elements including;

thermal connection elements in contact with the metallic thermal transfer layer of the first component; and

electrical connection elements configured to form at least part of an electrical connection between the front electrical connection face of the first integrated circuit chip and the second component;

wherein said thermal transfer layer is thermally linked to the wall of the apparatus via a thermal block made of a thermal conducting foam.