INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF

• US 20120061855A1
• Filed: 09/14/2010
• Published: 03/15/2012
• Est. Priority Date: 09/14/2010
• Status: Active Grant

• Current Assignee: Stats Chippac Pte. Ltd. (JCET Group Co., Ltd.)
• Original Assignee: Stats Chippac BVI limited (JCET Group Co., Ltd.)
• Inventors: Do, Byung Tai, Chua, Linda Pei Ee, Pagaila, Reza Argenty
• Granted Patent: US 8,378,477 B2
• Time in Patent Office: Days
• US Class Current: 257/778
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/566 Release layers for moulds, e.g. release layers, layers against residue during moulding
• CPC Class Codes: H01L 2224/13025 the bump connector being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1041 Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0001 : Technical content checked by a classifier
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15331 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18161 : of a flip chip
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/3511 : Warping

Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side; mounting an integrated circuit over the package substrate, the integrated circuit having an inactive side and an active side opposite the inactive side; connecting stack connectors to the substrate top side; applying a multi-layer film over the substrate top side, the integrated circuit, and the stack connectors, the multi-layer film having a base film layer, a penetrable film layer, and a penetrable adhesive; removing the base film layer and the penetrable film layer to expose the penetrable adhesive and exposed portions of the stack connectors; and forming an adhesive film layer by hardening the penetrable adhesive.

Claims

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side;

mounting an integrated circuit over the package substrate, the integrated circuit having an inactive side and an active side opposite the inactive side;

connecting stack connectors to the substrate top side;

applying a multi-layer film over the substrate top side, the integrated circuit, and the stack connectors, the multi-layer film having a base film layer, a penetrable film layer, and a penetrable adhesive;

removing the base film layer and the penetrable film layer to expose the penetrable adhesive and exposed portions of the stack connectors; and

forming an adhesive film layer by hardening the penetrable adhesive.

2. The method as claimed in claim 1 wherein connecting the stack connectors includes connecting the stack connectors to the substrate top side surrounding the integrated circuit.

3. The method as claimed in claim 1 wherein connecting the stack connectors includes connecting the stack connectors to the substrate top side between the integrated circuit and a periphery of the package substrate.

4. The method as claimed in claim 1 wherein removing the base film layer and the penetrable film layer includes removing the base film layer and the penetrable film layer to expose the exposed portions protruding from the adhesive film layer.

5. The method as claimed in claim 1 wherein mounting the integrated circuit includes mounting a wirebond die over the package substrate.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side;

mounting an integrated circuit over the package substrate, the integrated circuit having an inactive side and an active side opposite the inactive side;

connecting device connectors to the substrate top side and the active side;

connecting stack connectors to the substrate top side;

applying a multi-layer film over the substrate top side, the integrated circuit, and the stack connectors, the multi-layer film having a base film layer, a penetrable film layer, and a penetrable adhesive;

removing the base film layer and the penetrable film layer to expose the penetrable adhesive and exposed portions of the stack connectors; and

forming an adhesive film layer by hardening the penetrable adhesive.

7. The method as claimed in claim 6 wherein mounting the integrated circuit includes mounting the integrated circuit over the package substrate, the integrated circuit having vertical insertion areas electrically connected to the device connectors.

8. The method as claimed in claim 6 wherein connecting the stack connectors includes:

connecting an interface module to the substrate top side; and

connecting the stack connectors to the interface module.

9. The method as claimed in claim 6 further comprising forming a redistribution layer on the adhesive film layer.

10. The method as claimed in claim 6 further comprising:

connecting bottom stack connectors to the substrate bottom side; and

forming a bottom adhesive film layer covering portions of the bottom stack connectors.

11. An integrated circuit packaging system comprising:

a package substrate having a substrate bottom side and a substrate top side opposite the substrate bottom side;

an integrated circuit over the package substrate, the integrated circuit having an inactive side and an active side opposite the inactive side;

stack connectors connected to the substrate top side;

an adhesive film layer over the substrate top side covering the integrated circuit and portions of the stack connectors; and

exposed portions of the stack connectors with a portion of the adhesive film layer adhered to the stack connectors above a film top surface of the adhesive film layer characteristic of a penetrable adhesive penetrated by the stack connectors.

12. The system as claimed in claim 11 wherein the stack connectors are connected to the substrate top side surrounding the integrated circuit.

13. The system as claimed in claim 11 wherein the stack connectors are connected to the substrate top side between the integrated circuit and a periphery of the package substrate.

14. The system as claimed in claim 11 wherein the integrated circuit is a flip chip over the package substrate.

15. The system as claimed in claim 11 wherein the integrated circuit is a wirebond die over the package substrate.

16. The system as claimed in claim 11 further comprising device connectors connected to the substrate top side and the active side.

17. The system as claimed in claim 16 wherein the integrated circuit is over the package substrate, the integrated circuit having vertical insertion areas electrically connected to the device connectors.

18. The system as claimed in claim 16 further comprising:

an interface module connected to the substrate top side; and

wherein;

the stack connectors are connected to the interface module.

19. The system as claimed in claim 16 further comprising a redistribution layer on the adhesive film layer.

20. The system as claimed in claim 16 further comprising:

bottom stack connectors connected to the substrate bottom side; and

a bottom adhesive film layer covering portions of the bottom stack connectors.