METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR PERFORMING HOMOMORPHIC ENCRYPTION AND DECRYPTION ON INDIVIDUAL OPERATIONS

• US 20120066510A1
• Filed: 09/15/2010
• Published: 03/15/2012
• Est. Priority Date: 09/15/2010
• Status: Active Grant

• Current Assignee: AT&T Intellectual Property I LP (AT&T, Inc.)
• Original Assignee: AT&T Intellectual Property I LP (AT&T, Inc.)
• Inventors: Weinman, Joseph
• Granted Patent: US 8,681,973 B2
• Time in Patent Office: Days
• US Class Current: 713/189
• CPC Class Codes: H04L 9/008 involving homomorphic encryption

Abstract

A method of processing data includes receiving a request for an operand from a second processor at a first processor, encrypting the operand that has been requested using the first processor responsive to receiving the request for the operand, sending the operand that has been encrypted from the first processor to the second processor, receiving a result from the second processor at the first processor, the result generated from a single homomorphic operation being performed using the operand sent to the second processor, decrypting the result received from the second processor at the first processor, and receiving a request for the result that has been decrypted from the second processor at the first processor.

Claims

1. A method of processing data, comprising:

receiving a request for an operand from a second processor at a first processor;

encrypting the operand that has been requested using the first processor responsive to receiving the request for the operand;

sending the operand that has been encrypted from the first processor to the second processor;

receiving a result from the second processor at the first processor, the result generated from a single homomorphic operation being performed using the operand sent to the second processor;

decrypting the result received from the second processor at the first processor; and

receiving a request for the result that has been decrypted from the second processor at the first processor.

2. The method of claim 1, wherein the result is a first result and the single homomorphic operation is a single first homomorphic operation, the method further comprising:

encrypting the first result that has been requested using the first processor responsive to receiving the request for the first result;

sending the first result that has been encrypted from the first processor to the second processor;

receiving a second result from the second processor at the first processor, the second result generated from a single second homomorphic operation being performed using the first result sent to the second processor; and

decrypting the second result received from the second processor at the first processor.

3. The method of claim 1, wherein the first processor and second processor are coupled via an entrusted communication network.

4. The method of claim 1, wherein the first processor and the second processor are in a same integrated circuit device.

5. The method of claim 3, wherein the first processor and the second processor are separate virtual machines that execute on a common hardware platform.

6. The method of claim 1, wherein the operand has a multiplicative encryption pad and an additive encryption pad associated therewith.

7. The method of claim 6, wherein decrypting the result comprises:

selecting for the operand one of the multiplicative encryption pad and the additive encryption pad associated with the operand based on the single homomorphic operation; and

using the selected multiplicative encryption pad or additive encryption pad to decrypt the result.

8. The method of claim 7, wherein the single homomorphic operation is an addition operation and wherein selecting for the operand one of the multiplicative encryption pad and the additive encryption pad comprises selecting for the operand the additive encryption pad.

9. The method of claim 7, wherein the single homomorphic operation is a multiplication operation and wherein selecting for the operand one of the multiplicative encryption pad and the additive encryption pad comprises selecting for the operand the multiplicative encryption pad.

10. The method of claim 7, wherein the single homomorphic operation is a copy operation and wherein selecting for the operand one of the multiplicative encryption pad and the additive encryption pad comprises selecting for the operand the additive encryption pad.

11. The method of claim 7, wherein the single homomorphic operation is a negation operation and wherein selecting for the operand one of the multiplicative encryption pad and the additive encryption pad comprises selecting for the operand the additive encryption pad.

12. The method of claim 7, wherein the single homomorphic operation is an inversion operation and wherein selecting for the operand one of the multiplicative encryption pad and the additive encryption pad comprises selecting for the operand the multiplicative encryption pad.

13. A data processing system, comprising:

a memory comprising computer readable program code; and

a first processor that is coupled to the memory and is configured to execute the computer readable program code so as to cause the data processing system to receive a request for an operand from a second processor, to encrypt the operand that has been requested responsive to receiving the request for the operand, to send the operand that has been encrypted to the second processor, to receive a result from the second processor, the result generated from a single homomorphic operation being performed using the operand sent to the second processor, to decrypt the result received from the second processor, and to receive a request for the result that has been decrypted from the second processor at the first processor.

14. The data processing system of claim 13, wherein the first processor and second processor are coupled via an untrusted communication network.

15. The data processing system of claim 13, wherein the first processor and the second processor are in a same integrated circuit device.

16. The data processing system of claim 15, wherein the first processor and the second processor are separate virtual machines that execute on a common hardware platform.

17. An article of manufacture, comprising:

a non-transitory computer readable storage medium having computer readable program code embodied therein, the computer readable program code comprising;

computer readable program code configured to receive a request for an operand from a second processor at a first processor;

computer readable program code configured to encrypt the operand that has been requested using the first processor responsive to receiving the request for the operand;

computer readable program code configured to send the operand that has been encrypted from the first processor to the second processor;

computer readable program code configured to receive a result from the second processor at the first processor, the result generated from a single homomorphic operation being performed using the operand sent to the second processor;

computer readable program code configured to decrypt the result received from the second processor at the first processor; and

computer readable program code configured to receive a request for the result that has been decrypted from the second processor at the first processor.

18. The article of manufacture of claim 17, wherein the first processor and second processor are coupled via an untrusted communication network.

19. The article of manufacture of claim 17, wherein the first processor and the second processor are in a same integrated circuit device.

20. The article of manufacture of claim 19, wherein the first processor and the second processor are separate virtual machines that execute on a common hardware platform.