DISPLAY DEVICE

• US 20120068994A1
• Filed: 11/05/2010
• Published: 03/22/2012
• Est. Priority Date: 09/21/2010
• Status: Abandoned Application

• Current Assignee: Chunghwa Picture Tubes Limited (Tatung Co., Ltd.)
• Original Assignee: Chunghwa Picture Tubes Limited (Tatung Co., Ltd.)
• Inventors: Li, Hung-Chun, Liao, Mu-Shan, Lan, Tung-Hsin
• Application Number:
  US12/940,053
• Publication Number:
  US 20120068994A1
• Time in Patent Office: Days
• US Class Current: 345/213
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3677 suitable for active matrices only

Abstract

A display device including a timing controller and a display panel is provided. The timing controller provides a clock signal and an inverted signal of the clock signal. The display panel includes a substrate, a pixel array and a plurality of shift registers. The pixel array is disposed on the substrate. The shift registers are disposed on the substrate and respectively coupled to the timing controller. The shift registers sequentially output a plurality of scanning signals to drive the pixel array according to the clock signal and the inverted signal. In a display period of a frame period, frequencies of the clock signal and the inverted signal are a first frequency. In a vertical blanking period of the frame period, frequencies of the clock signal and the inverted signal are a second frequency. The second frequency is smaller than the first frequency.

Claims

1. A display device, comprising:

a timing controller, for providing a clock signal and an inverted signal; and

a display panel, comprising;

a substrate;

a pixel array, disposed on the substrate; and

a plurality of shift registers, disposed on the substrate, and respectively coupled to the timing controller, the shift registers sequentially outputting a plurality of scanning signals according to the clock signal and the inverted signal, so as to drive the pixel array,

wherein in a display period of a frame period, frequencies of the clock signal and the inverted signal are a first frequency, and in a vertical blanking period of the frame period, frequencies of the clock signal and the inverted signal are a second frequency, wherein the second frequency is smaller than the first frequency.

2. The display device as claimed in claim 1, wherein the second frequency is 1/n-th power of 2 of the first frequency, wherein n is a positive integer.

3. The display device as claimed in claim 2, wherein the second frequency is ½

of the first frequency.

4. The display device as claimed in claim 2, wherein the second frequency is ¼

of the first frequency.