CONTROLLER CHIP WITH ZEROIZABLE ROOT KEY

• US 20120069995A1
• Filed: 09/22/2010
• Published: 03/22/2012
• Est. Priority Date: 09/22/2010
• Status: Abandoned Application

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Matthews, Donald Preston Jr.
• Application Number:
  US12/887,586
• Publication Number:
  US 20120069995A1
• Time in Patent Office: Days
• US Class Current: 380/44
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: H04L 9/0866 involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics

Abstract

The present invention is a data storage device that includes a control chip with a zeroizable root key. In one embodiment, the control chip comprises a digital memory, the zeroizable root key being a derived root key obtained by applying a firmware root key to a different root key stored within the digital memory such that the setting of each bit of the different root key is locked.

Claims

1. A control chip with a one-time programmable memory in which is stored one of at least two root keys necessary for deriving a zeroizable root key.

2. The control chip of claim 1, wherein the root key stored in the one-time programmable memory is a one-time programmable root key.

3. The control chip of claim 1, wherein the root key stored in the one-time programmable memory is a blended one-time programmable root key.

4. The control chip of claim 1, wherein the zeroizable root key is a zeroizable blended root key.

5. The control chip of claim 1, wherein the zeroizable root key is a zeroizable base root key.

6. The control chip of claim 1, wherein the zeroizable root key is a zeroizable base root key that has been transformed based on a firmware root key.

7. The control chip of claim 1, wherein the root key stored in the one-time programmable memory is stored such that the setting of each bit of the root key is locked.

8. The control chip of claim 1, wherein each bit of the root key stored in the one-time programmable memory is locked by a fuse or antifuse.

9. The control chip of claim 1, wherein the control chip includes a control module that utilizes a firmware root key as a computational basis for processing a zeroizable base root key so as to derive a blended one-time programmable root key, the blended one-time programmable root key being the root key stored in said one-time programmable memory.

10. The control chip of claim 7, wherein the blended one-time programmable root key and the firmware root key are both stored in data storage memory mechanisms that are functionally connected to the control chip.

13. The device of claim 1, wherein the zeroizable root key is a zeroizable blended root key.

14. The device of claim 1, wherein the zeroizable root key is a zeroizable base root key.

20. The apparatus of claim 13, wherein the different root key is stored in the one-time programmable memory such that each bit of the different root key is locked by a fuse or antifuse.

11. A data storage device that includes a control chip with a zeroizable root key, the zeroizable root key being a derived root key obtained by applying a firmware root key to a different root key stored within the digital memory such that the setting of each bit of the different root key is locked.

12. The device of claim 11, wherein the different root key is a blended one-time programmable root key.

15. A method, comprising:

generating a zeroizable root key by applying an alterable root key to a different root key stored in a one-time programmable memory;

utilizing the zeroizable root key to encrypt or decrypt data.

16. The method of claim 15, wherein applying the alterable root key to the different root key comprises applying the alterable root key to a blended one-time programmable root key.

17. The method of claim 15, where in the alterable root key is a firmware root key obtained from a firmware component.

18. The method of claim 15, wherein changing the alterable root key causes the zeroizable root key to be altered.

19. The method of claim 15, wherein the different root key is stored in the one-time programmable memory such that each bit of the different root key is locked.