ENERGY DETECTION METHOD AND AN ENERGY DETECTION CIRCUIT USING THE SAME

• US 20120072151A1
• Filed: 12/29/2010
• Published: 03/22/2012
• Est. Priority Date: 09/16/2010
• Status: Active Grant

• Current Assignee: Industrial Technology Research Institute
• Original Assignee: Industrial Technology Research Institute
• Inventors: CHEN, Jian-Yu, LO, Shun-Chang, CHUANG, Gene C.H.
• Granted Patent: US 8,494,797 B2
• Time in Patent Office: Days
• US Class Current: 702/69
• CPC Class Codes: H04B 17/327 Received signal code power [RSCP]
• CPC Class Codes: H04W 52/52 using AGC [Automatic Gain Control] circuits or amplifiers

Abstract

An energy detection method is provided. The method obtains an initial time point of an input signal with reference to a digital signal corresponding to the input signal. An i^th sample value is obtained by sampling the digital signal. The (i−M−N+1)^th to the (i−N)^th sample values and the (i−N+1)^th to the i^th sample value are buffered. The weighting coefficient is set to with initial value. A first parameter is obtained according to the weighting coefficient and the (i−M−N+1)^th to the (i−N)^th sample values, and a second parameter is obtained according to the (i−N+1)^th to the i^th sample values. A comparison between the first parameter and the second parameter is made, and the sampling time point of the (i−N+1)^th sample value is determined as the signal initial time point when the second parameter is greater than the first parameter.

Claims

1. An energy detection circuit used in a receiver for obtaining a signal initial time point corresponding to the input signal with reference to a signal corresponding to an input signal, wherein the energy detection circuit comprises:

a value obtaining switch turned on in response to a control signal to provide an i^th sample value of the signal at a first sampling time point, wherein is a natural number greater than 1;

a shift register used for buffering an (i−

M−

N+1)^th to the i^th sample values, wherein M and N both are natural numbers greater than 1, and the shift register comprises;

a first sliding window value obtainer used for buffering the (i−

M−

N+1)^th to an (i−

N)^th sample values;

a second sliding window value obtainer used for buffering an (i−

N+1)^th to the i^th sample value;

a first arithmetic unit used for obtaining a first parameter according to a weighting coefficient K and the (i−

M−

N+1)^th to the (i−

N)^th sample values;

a second arithmetic unit used for obtaining a second parameter according to the (i−

N+1)^th to the i^th sample values;

a comparator used for comparing the first parameter to the second parameter, and providing an energy detection signal when the second parameter is greater than the first parameter; and

a processor used for setting the weighting coefficient K with an initial value, wherein the processor further determines whether the energy detection signal is received, and the processor determines an (i−

N+1)^th sampling time point of the (i−

N+1)^th sample value as the signal initial time point when the energy detection signal is received.

2. The energy detection circuit according to claim 1, wherein, the processor further determines whether signal synchronization operation is achieved, and further calculates a signal to noise ratio (SNR) of the input signal when the signal synchronization operation is achieved so as to set the weighting coefficient K accordingly;

wherein, the processor further provides the control signal to drive the value obtaining switch to provide the (i+1)^th sample value when the second parameter is not greater than the first parameter.

3. The energy detection circuit according to claim 1, wherein the shift register further comprises:

an overflowing register used for buffering an (i−

M−

N)^th sample value.

4. The energy detection circuit according to claim 1, wherein the first arithmetic unit comprises:

a register used for buffering a first sum of an (i−

M−

N)^th to an (i−

N−

1)^th sample values;

an adder used for deducting the first sum by the (i−

M−

N)^th sample value to obtain a difference, and adding the (i−

N)^th sample value to the difference to obtain a second sum of the (i−

M−

N+1)^th to the (i−

N)^th sample values; and

a divider used for dividing the second sum by the value M to obtain the computation parameter; and

a multiplier used for obtaining the first parameter according to the computation parameter and the weighting coefficient K.

5. The energy detection circuit according to claim 1, wherein the second arithmetic unit comprises:

a register used for buffering a first sum of the (i−

N)^th to the (i−

1)^th sample values;

an adder used for deducting the first sum by the (i−

N)^th sample value to obtain a difference, and adding the i^th sample value to the difference to obtain a second sum of the (i−

N+1)^th to the i^th sample values; and

a divider used for dividing the second sum by the value N to obtain the second parameter.

6. The energy detection circuit according to claim 5, wherein the second arithmetic unit further comprises:

a counting switch coupled between the divider and the comparator, and turned on to provide the second parameter to the comparator when i is greater than or equal to M+N.

7. The energy detection circuit according to claim 1, wherein when the synchronization of the signal is failed, the processor determines the operation of determining the sampling time point as the signal initial time point as a false alarm, and further increases the value of the weighting coefficient K;

wherein, the first arithmetic unit obtains the updated first parameter according to the increased weighting coefficient K and the (i−

M−

N+1)^th to the (i−

N)^th sample values, and the comparator correspondingly compares the updated first parameter to the second parameter, and provides an updated energy detection signal when the second parameter is greater than the updated first parameter;

wherein, the processor further continuously determines whether the updated energy detection signal is received, and determines whether the synchronization of the signal is successful when receiving the updated energy detection signal.

8. The energy detection circuit according to claim 7, wherein when signal synchronization operation is achieved, the processor calculates the SNR of the input signal and accordingly sets the weighting coefficient K.

9. The energy detection circuit according to claim 1, wherein the processor decreases the value of the weighting coefficient K when the energy detection signal is not received;

wherein, the first arithmetic unit obtains the updated first parameter according to the decreased weighting coefficient K and the (i−

M−

N+1)^th to the (i−

N)^th sample values, the comparator correspondingly compares the updated first parameter to the second parameter, and provides an updated energy detection signal when the second parameter is greater than the updated first parameter;

wherein, the processor further continuously determines whether the updated energy detection signal is received, and further determines whether the synchronization of the signal is successful when receiving the updated energy detection signal.

10. The energy detection circuit according to claim 9, wherein when signal synchronization operation is achieved, the processor calculates the SNR of the input signal and accordingly sets the weighting coefficient K.

11. An energy detection method used in a receiver obtaining a signal initial time point corresponding to the input signal with reference to a signal corresponding to an input signal, wherein the energy detection method comprises:

obtaining an i^th sample value by sampling the signal at a sampling time point, wherein i is a natural number greater than 1;

buffering an (i−

M−

N+1)^th to an (i−

N)^th sample values, and buffering an (i−

N+1)^th to an i^th sample value, wherein M and N both are a natural number greater than 1;

setting a weighting coefficient K to an initial value;

obtaining a first parameter according to the weighting coefficient K and the (i−

M−

N+1)^th to the (i−

N)^th sample values, and obtaining a second parameter according to the (i−

N+1)^th to the i^th sample value;

comparing the first parameter to the second parameter to determine whether the second parameter is greater than the first parameter;

providing an energy detection signal to determine an (i−

N+1)^th sampling time point corresponding to the (i−

N+1)^th sample values as the signal initial time point, and determining whether signal synchronization operation is achieved when the second parameter is greater than the first parameter; and

calculating a SNR of the input signal and accordingly setting the weighting coefficient K when the signal synchronization operation is achieved.

12. The energy detection method according to claim 11, further comprising:

determining the operation of determining the sampling time point as the signal initial time point as a false alarm, and increasing the value of the weighting coefficient K when the synchronization of the signal is failed;

obtaining the updated first parameter according to the increased weighting coefficient K and the (i−

M−

N+1)^th to the (i−

N)^th sample values;

comparing the updated first parameter and the second parameter, and providing an updated energy detection signal when the second parameter is greater than the updated first parameter;

comparing the first parameter to the second parameter to determine whether the second parameter is greater than the first parameter;

providing an updated energy detection signal indicating the sampling time point is the signal initial time point and determine whether the signal synchronization operation is achieved, when the second parameter is greater than the first parameter; and

calculating the SNR of the input signal and accordingly setting the weighting coefficient K when the synchronization of the signal is successful.

13. The energy detection method according to claim 11, further comprising:

decreasing the value of the weighting coefficient K when the second parameter is not greater than the first parameter;

obtaining the updated first parameter according to the increased weighting coefficient K and the (i−

M−

N+1)^th to the (i−

N)^th sample values;

comparing the updated first parameter to the second parameter, and providing an updated energy detection signal indicating the sampling time point the signal initial time point and determine whether the signal synchronization operation is achieved, when the second parameter is greater than the updated first parameter; and

calculating the SNR of the input signal and accordingly setting the weighting coefficient K when the synchronization of the signal is successful.

14. The energy detection method according to claim 11, wherein further comprises:

buffering an (i−

M−

N)^th sample value.

15. The energy detection method according to claim 14, wherein the step of obtaining the first parameter according to the weighting coefficient K and the (i−

M−

N+1)^th to the (i−

N)^th sample values comprises;

buffering a first sum of the (i−

M−

N)^th to an (i−

N−

1)^th sample values;

deducting the first sum by the (i−

M−

N)^th sample value to obtain a difference, and adding the (i−

N)^th sample value to the difference to obtain a second sum of the (i−

M−

N+1)^th to the (i−

N)^th sample values; and

dividing the second sum by the value M and multiplied with weighting coefficient K to obtain the first parameter.

16. The energy detection method according to claim 11, wherein the step of obtaining the second parameter according to the (i−

N+1)^th to the i^th sample values comprises;

buffering a first sum of the (i−

N)^th to the (i−

1)^th sample values;

deducting the first sum by the (i−

N)^th sample value to obtain a difference, and adding the i^th sample value to the difference to obtain a second sum of the (i−

N+1)^th to the i^th sample value; and

dividing the second sum by the value N to obtain the second parameter.