DATA PROCESSING APPARATUS, CONTROL DEVICE AND DATA STORAGE DEVICE
First Claim
1. A data processing apparatus configured to process data, the data processing apparatus comprising:
- a first memory configured to be a dynamic random access memory;
a second memory configured to be a nonvolatile random access memory storing data; and
a control processing unit configured to control the first memory to store write data to write in the first memory when the write data rewritten data having much number of rewrite times and to control the second memory to store the write data in the second memory when the write data is not the high rewritten data.
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Accused Products
Abstract
When write data D is high rewritten data, a PC 10 controls a DRAM 24 to store the write data D (steps S100 and S110). When the write data D is not the high rewritten data, the PC 10 outputs an RRAM write request signal and the write data D to an SSD (step S100 and S120). A memory controller of the SSD input the RRAM write request signal controls the RRAM and an SRAM to store the write data D in the RRAM or the SRAM. This treatment enables data stored in the DRAM to be rewritten frequently. Therefore, the decrease of number of times of refresh operation of the DRAM and the decrease of power consumption are accomplished.
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Citations
33 Claims
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1. A data processing apparatus configured to process data, the data processing apparatus comprising:
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a first memory configured to be a dynamic random access memory; a second memory configured to be a nonvolatile random access memory storing data; and a control processing unit configured to control the first memory to store write data to write in the first memory when the write data rewritten data having much number of rewrite times and to control the second memory to store the write data in the second memory when the write data is not the high rewritten data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A data processing apparatus configured to process data, the data processing apparatus comprising:
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a first memory configured to be a volatile random access memory; a second memory configured to be a nonvolatile random access memory; and a control processing unit configured to control the first memory and the second memory to read out data stored in the first memory and then store the read data in the second memory, and cuts off power supply from external power supply to the first memory and the second memory after finishing storing data in the second memory when the stop of the data processing apparatus is requested. - View Dependent Claims (18, 19, 20)
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21. A control device configured to control a nonvolatile memory configured to be as a nonvolatile random access memory to store write data input from a host sequentially in an area equivalent to information of logical address input from the host device, the control device comprising:
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a volatile memory unit configured to be a volatile random access memory; a conversion table memory unit configured to generate and store an address conversion table when write request signal requesting data input from the host device in the nonvolatile memory is input, the address conversion table being showing relation between the information of the logical address and information of a physical address in the nonvolatile memory in converting the input information of the logical address into information of the physical address to rewrite data in an area of a storage area capable of storing data in the nonvolatile memory, the area of the storage area capable of storing data having comparatively less number of the rewrite times; and a memory control unit configured to convert the input information of the logical address into the information of the physical address using the stored address conversion table and control the nonvolatile memory to store the write data in an area of the nonvolatile memory equivalent to the converted information of the physical address when the write request signal is input and the input write data has size of equal to or more than predefined size, and to control the volatile memory unit to store the write data in an area of the volatile memory unit equivalent to the input logical address even as the write request signal is input when the input write data has size of less than predefined size. - View Dependent Claims (22, 23, 24, 25)
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26. A control device transferring data between a host device, a nonvolatile storage device configured to be as a nonvolatile type storage device, a first nonvolatile memory configured to be as a nonvolatile random access memory, and a second nonvolatile memory configured to be as the nonvolatile random access memory, the control device comprising:
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a first encoding processing unit configured to control the nonvolatile storage device to store the input write data from the host device when the storage device write request signal requesting writing data in the nonvolatile storage device is input from the host device and the input write data from the host device is not high frequent access data read and written frequently, and to encode the input write data into first error correction code and control the first nonvolatile memory to store the encoded data when the storage device write request signal is input from the host device and the input write data is the high frequent access data; a second encoding processing unit configured to encode the input write data into a second error correction code correcting less errors than the first error correction code and control the second nonvolatile memory to store the encoded data when the memory write request signal requesting writing data in the second nonvolatile memory is input from the host device; a first decoding processing unit configured to control the nonvolatile storage device to read out data from the nonvolatile storage device when the storage readout request signal requesting reading out data in the nonvolatile storage device is input from the host device and output data to be output is not the high frequent access data, and to control the first nonvolatile memory to read out data from the first nonvolatile memory, perform error correction and decoding the read data as the first error correction code, and output the decoded data to the host device when the storage readout request signal is input from the host device and the output data is the high frequent access data; and a second decoding processing unit configured to control the second nonvolatile memory to read out data from the second nonvolatile memory, perform error correction and decoding the read data as the second error correction code, and output the decoded data to the host device when memory readout request signal requesting reading out data from the second nonvolatile memory is input from the host device. - View Dependent Claims (27, 28, 29)
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30. A data processing apparatus processing data, the data processing apparatus comprising:
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a nonvolatile memory configured to be as a nonvolatile random access memory and store data; an information output unit configured to output reliability information including information of reliability of the nonvolatile memory; and a control processing unit configured to execute a predefined process using the output reliability information. - View Dependent Claims (31)
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32. A data processing apparatus processing data, the data processing apparatus comprising:
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a resistance memory configured to store program; and a control processing unit configured to control the resistance memory to read out program stored therein when the readout of the program is requested. - View Dependent Claims (33)
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Specification