WAFER-LEVEL LIGHT EMITTING DIODE PACKAGE AND METHOD OF FABRICATING THE SAME

• US 20120074441A1
• Filed: 07/29/2011
• Published: 03/29/2012
• Est. Priority Date: 09/24/2010
• Status: Active Grant

• Current Assignee: Seoul Semiconductor Co., Ltd.
• Original Assignee: Seoul Semiconductor Co., Ltd.
• Inventors: SEO, Won Cheol, KAL, Dae Sung
• Granted Patent: US 9,070,851 B2
• Time in Patent Office: Days
• US Class Current: 257/91
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 2933/0025 relating to coatings
• CPC Class Codes: H01L 2933/0033 relating to semiconductor body packages
• CPC Class Codes: H01L 2933/0041 relating to wavelength conversion elements
• CPC Class Codes: H01L 2933/005 relating to encapsulations
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 2933/0075 relating to heat extraction or cooling elements
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/10 with a light reflecting structure, e.g. semiconductor Bragg reflector
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/32 : containing nitrogen
• CPC Class Codes: H01L 33/38 : with a particular shape
• CPC Class Codes: H01L 33/382 : the electrode extending partially in or entirely through the semiconductor body
• CPC Class Codes: H01L 33/385 : the electrode extending at least partially onto a side surface of the semiconductor body
• CPC Class Codes: H01L 33/405 : Reflective materials
• CPC Class Codes: H01L 33/42 : Transparent materials
• CPC Class Codes: H01L 33/44 : characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/46 : Reflective coating, e.g. dielectric Bragg reflector
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/50 : Wavelength conversion elements
• CPC Class Codes: H01L 33/502 : Wavelength conversion materials
• CPC Class Codes: H01L 33/505 : characterised by the shape, e.g. plate or foil
• CPC Class Codes: H01L 33/507 : the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
• CPC Class Codes: H01L 33/56 : Materials, e.g. epoxy or silicone resin
• CPC Class Codes: H01L 33/58 : Optical field-shaping elements
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/642 : characterized by the shape
• CPC Class Codes: H01L 33/647 : the elements conducting electric current to or from the semiconductor body

Abstract

Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.

Claims

1. A light emitting diode (LED) package, comprising:

a semiconductor stack comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;

a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer;

a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes;

a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and

a protective insulation layer covering a sidewall of the semiconductor stack.

2. The LED package of claim 1, further comprising a wavelength converter arranged on a second side of the semiconductor stack, the second side being opposite to the first side of the semiconductor stack.

3. The LED package of claim 2, wherein the wavelength converter comprises a phosphor sheet or an impurity-doped single crystal substrate.

4. The LED package of claim 2, wherein the wavelength converter comprises a side surface flush with a side surface of the protective insulation layer.

5. The LED package of claim 1, wherein the protective insulation layer comprises a distributed Bragg reflector.

6. The LED package of claim 1, wherein the first conductive type semiconductor layer comprises a roughened surface.

7. The LED package of claim 1, further comprising an insulation layer arranged on side surfaces of the first bump and the second bump.

8. The LED package of claim 7, further comprising a dummy bump arranged between the first bump and the second bump.

9. The LED package of claim 1, further comprising a substrate comprising a first through-hole and a second through-hole, the first bump and the second bump being arranged in the first through-hole and the second through-hole, respectively.

10. The LED package of claim 9, wherein the substrate comprises sapphire or silicon.

11. The LED package of claim 1, further comprising:

a first contact layer comprising first contact sections contacting the first conductive type semiconductor layer in the plurality of contact holes and a connecting section connecting the first contact sections to each other; and

a second contact layer contacting the second conductive type semiconductor layer,

wherein the protective insulation layer comprises a first insulation layer and a second insulation layer, the first insulation layer being arranged between the first contact layer and the second contact layer and covering the second contact layer, and the second insulation layer being arranged between the semiconductor stack and the first contact layer and covering the first contact layer,

wherein the first bump is electrically connected to the first contact layer, and the second bump is electrically connected to the second contact layer.

12. The LED package of claim 11, further comprising:

a first electrode pad contacting the first contact layer through a first contact hole arranged in the second insulation layer; and

a second electrode pad contacting the second contact layer though a second contact hole arranged in the second insulation layer and the first insulation layer,

wherein the first bump and the second bump contact the first electrode pad and the second electrode pad, respectively.

13. The LED package of claim 11, wherein at least one of the first insulation layer and the second insulation layer comprises a distributed Bragg reflector.

14. A light emitting diode (LED) module, comprising:

a circuit board;

the LED package of claim 1 arranged on the circuit board; and

a lens to adjust an orientation angle of light emitted from the LED package.

15. The LED module of claim 14, wherein the circuit board comprises a metal core printed circuit board (MC-PCB), and a plurality of the LED packages is arranged on the MC-PCB.

16. A method of fabricating a light emitting diode (LED) package, the method comprising:

forming a semiconductor stack on a first substrate, the semiconductor stack comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;

patterning the semiconductor stack to form a chip separation region;

patterning the second conductive type semiconductor layer and the active layer to form a plurality of contact holes exposing the first conductive type semiconductor layer;

forming a protective insulation layer covering a sidewall of the semiconductor stack in the chip separation region; and

forming a first bump and a second bump on the semiconductor stack,

wherein the first bump is electrically connected to the first conductive type semiconductor layer via the plurality of contact holes, and the second bump is electrically connected to the second conductive type semiconductor layer.

17. The method of claim 16, wherein the first substrate comprises an impurity for converting a wavelength of light generated in the active layer.

18. The method of claim 16, further comprising:

removing the first substrate to expose the first conductive type semiconductor layer; and

attaching a phosphor sheet to the exposed first conductive type semiconductor layer.

19. The method of claim 16, wherein forming the protective insulation layer comprises forming a first insulation layer and a second insulation layer.

20. The method of claim 19, further comprising:

forming a second contact layer on the second conductive type semiconductor layer;

forming the first insulation layer to cover the second contact layer and sidewalls of the plurality of contact holes, the first insulation layer comprising openings exposing the first conductive type semiconductor layer in the plurality of contact holes;

forming a first contact layer on the first insulation layer, the first contact layer comprising;

contact sections contacting the first conductive type semiconductor layer exposed in the plurality of contact holes; and

a connecting section connecting the contact sections to each other;

forming the second insulation layer to cover the first contact layer;

patterning the first insulation layer and the second insulation layer to form an opening exposing the first contact layer;

forming an opening exposing the second contact layer; and

forming a first electrode pad and a second electrode pad on the second insulation layer, the first electrode pad and the second electrode pad to be respectively connected to the first contact layer and the second contact layer through the openings,

wherein the first bump and the second bump are electrically connected to the first electrode pad and the second electrode pad, respectively.

21. The method of claim 20, wherein forming the first bump and the second bump comprises forming an insulation layer pattern having openings exposing regions of the first electrode pad and the second electrode pad, and plating the exposed regions of the first electrode pad and the second electrode pad with a metallic material.

22. The method of claim 21, further comprising:

forming a dummy bump between the first bump and the second bump.

23. The method of claim 20, further comprising bonding a second substrate on the first electrode pad and the second electrode pad before forming the first bump and the second bump, wherein forming the first bump and the second bump comprises forming a plurality of through-holes in the second substrate, filling the through-holes with a metallic material, and bonding the metallic material to the first electrode pad and the second electrode pad.

24. The method of claim 23, further comprising:

before bonding the second substrate, forming an insulation layer covering the first electrode pad and the second electrode pads, and patterning the insulation layer to expose the first electrode pad and the second electrode pad.

25. A light emitting diode (LED) package, comprising:

a plurality of light emitting cells each comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;

a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer of each of the light emitting cells, the contact holes exposing the first conductive type semiconductor layer of each of the light emitting cells;

a protective insulation layer covering a sidewall of each of the light emitting cells;

a connector located arranged on a first side of the light emitting cells and electrically connecting two adjacent light emitting cells to each other;

a first bump arranged on the first side of the light emitting cells and electrically connected to the first conductive type semiconductor layer via the plurality of contact holes of a first light emitting cell of the light emitting cells; and

a second bump arranged on the first side of the light emitting cells and electrically connected to the second conductive type semiconductor layer of a second light emitting cell of the light emitting cells.

26. The LED package of claim 25, further comprising a wavelength converter arranged on a second side of the plurality of light emitting cells, the second side being opposite to the first side of the plurality of light emitting cells.

27. The LED package of claim 26, wherein the wavelength converter comprises a phosphor sheet or an impurity-doped single crystal substrate.

28. The LED package of claim 26, wherein the wavelength converter has a side surface flush with a side surface of the protective insulation layer.

29. The LED package of claim 25, wherein the protective insulation layer comprises a distributed Bragg reflector.

30. The LED package of claim 25, wherein the first conductive type semiconductor layer of each of the light emitting cells comprises a roughened surface.

31. The LED package of claim 25, further comprising an insulation layer arranged on side surfaces of the first bump and the second bump.

32. The LED package of claim 31, further comprising a dummy bump arranged between the first bump and the second bump.

33. The LED package of claim 25, further comprising a substrate comprising a first through-hole and a second through-hole, the first bump and the second bump being arranged in the first through-hole and the second through-hole, respectively.

34. The LED package of claim 33, wherein the substrate comprises grooves arranged in a lower surface thereof and filled with a metallic material.

35. The LED package of claim 25, further comprising:

a first contact layer comprising first contact sections contacting the first conductive type semiconductor layer of each of the light emitting cells in the plurality of contact holes and a connecting section connecting the first contact sections to each other; and

a second contact layer contacting the second conductive type semiconductor layer of each of the light emitting cells,

wherein the protective insulation layer comprises a first insulation layer and a second insulation layer, the first insulation layer being arranged between the first contact layer and the second contact layer and covering the second contact layer, and a second insulation layer being arranged between the semiconductor stack and the first contact layer and covering the first contact layer,

wherein the connector is arranged directly under the second insulation layer, the connector to connect the first contact layer and the second contact layer to each other, the first bump contacting the first contact layer of the first light emitting cell, and the second bump is contacting the second contact layer of the second light emitting cell.

36. The LED package of claim 35, further comprising:

a first electrode pad contacting the first contact layer of the first light emitting cell through a first contact hole arranged in the second insulation layer; and

a second electrode pad contacting the second contact layer of the second light emitting cell though a second contact hole arranged in the second insulation layer and the first insulation layer,

wherein the first bump and the second bump contact the first electrode pad and the second electrode pad, respectively.

37. The LED package of claim 36, wherein the connector is arranged at a same level as the first electrode pad and the second electrode pad.

38. The LED package of claim 36, further comprising a third insulation layer being arranged between the dummy bump and the connector.

39. The LED package of claim 35, wherein at least one of the first insulation layer and second insulation layer comprises a distributed Bragg reflector.

40. A light emitting diode module, comprising:

a circuit board;

the LED package of claim 25 arranged on the circuit board; and

a lens to adjust an orientation angle of light emitted from the LED package.

41. The LED module of claim 40, wherein the circuit board comprises a metal core printed circuit board (MC-PCB), and a plurality of the LED packages are mounted on the MC-PCB.

42. A method of fabricating a light emitting diode (LED) package, the method comprising:

forming a semiconductor stack on a first substrate, the semiconductor stack comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer;

patterning the semiconductor stack to form a chip separation region and a light emitting cell separation region;

patterning the second conductive type semiconductor layer and the active layer to form a plurality of light emitting cells, each light emitting cell comprising a plurality of contact holes exposing the first conductive type semiconductor layer;

forming a protective insulation layer covering a sidewall of the semiconductor stack in the chip separation region and the light emitting cell separation region;

forming a connector connecting adjacent light emitting cells to each other in series; and

forming a first bump and a second bump on the plurality of light emitting cells,

wherein the first bump is electrically connected to the first conductive type semiconductor layer via the plurality of contact holes of a first light emitting cell of the light emitting cells, and the second bump being electrically connected to the second conductive type semiconductor layer of a second light emitting cell of the light emitting cells.

43. The method of claim 42, wherein the first substrate comprises an impurity for converting a wavelength of light generated in the active layer

44. The method of claim 42, further comprising:

removing the first substrate to expose the light emitting cells; and

attaching a phosphor sheet to the exposed light emitting cells.

45. The method of claim 42, wherein forming the protective insulation layer comprises forming a first insulation layer and a second insulation layer.

46. The method of claim 45, further comprising:

forming a second contact layer on the second conductive type semiconductor layer of each of the light emitting cells;

forming the first insulation layer to cover the second contact layer of each of the light emitting cells and sidewalls of the plurality of contact holes, the first insulation layer comprising openings exposing the first conductive type semiconductor layer in the plurality of contact holes;

forming a first contact layer on the first insulation layer of each of the light emitting cells, the first contact layer comprising;

contact sections contacting the first conductive type semiconductor layer exposed in the plurality of contact holes; and

a connecting section connecting the contact sections to each other;

forming the second insulation layer to cover the first contact layer of each of the light emitting cells;

patterning the first insulation layer and the second insulation layer of each of the light emitting cells to form an opening exposing the first contact layer;

forming an opening exposing the second contact layer; and

forming a first electrode pad and a second electrode pad on the second insulation layer, the first electrode pad and the second electrode pad to be respectively connected to the first contact layer of the first light emitting cell and the second contact layer of the second light emitting cell through the openings,

wherein the connector is formed on the second insulation layer and contacts the first contact layer and second contact layer of each of the adjacent light emitting cells through the openings, and the first bump and the second bump are electrically connected to the first electrode pad and the second electrode pad, respectively.

47. The method of claim 46, wherein forming the first bump and the second bump comprises forming an insulation layer pattern having openings exposing regions of the first electrode pad and the second electrode pad, and plating the exposed regions of the first electrode pad and the second electrode pad with a metallic material.

48. The method of claim 47, further comprising:

forming a dummy bump between the first bump and the second bump.

49. The method of claim 48, further comprising:

before forming the dummy bump, forming a third insulation layer to cover the first electrode pad, the second electrode pad, and the connector, and patterning the third insulation layer to expose the first electrode pad and the second electrode pad.

50. The method of claim 46, wherein forming the first bump and the second bump comprises forming a plurality of through-holes in the insulation substrate, filling the through-holes with a metallic material, and bonding the metallic material to the first electrode pad and the second electrode pad.

51. The method of claim 50, further comprising:

before forming the dummy bump, forming a third insulation layer to cover the first electrode pad, the second electrode pad, and the connector, and patterning the third insulation layer to expose the first electrode pad and the second electrode pad.