Enclosure Power Controller

• US 20120079299A1
• Filed: 06/19/2009
• Published: 03/29/2012
• Est. Priority Date: 06/19/2009
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Inventors: Cepulis, Darren J., Hua, Chanh V., Hashmany, Yasir Q., Christensen, Scott T.
• Granted Patent: US 9,058,155 B2
• Time in Patent Office: Days
• US Class Current: 713/320
• CPC Class Codes: G06F 1/183 Internal mounting support structures, e.g. for printed circuit boards, internal connecting means for buses G06F13/409
• CPC Class Codes: G06F 1/189 Power distribution
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/263 Arrangements for using multiple switchable power supplies, e.g. battery and AC G06F1/30 takes precedence
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3206 Monitoring of events, devices or parameters that trigger a change in power modality
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A system and method for controlling power consumption is described herein. A computer system includes an enclosure. The enclosure is configured to contain a plurality of removable compute nodes. The enclosure includes a power controller configured to individually control an amount of power consumed by each of the plurality of removable compute nodes. The power controller provides a plurality of power control signals. Each power control signal is provided to and controls the power consumption of one of the plurality of removable compute nodes.

Claims

1. A computer system, comprising:

an enclosure configured to contain a plurality of removable compute nodes, the enclosure comprising a power controller configured to individually control an amount of power consumed by each of the plurality of removable compute nodes;

wherein the power controller provides a plurality of power control signals, each power control signal provided to and controlling the power consumption of one of the plurality of removable compute nodes.

2. The computer system as in claim 1, wherein the power controller comprises power measurement circuitry separate from the plurality of compute nodes that individually measures an amount of power consumed by each of the plurality of compute nodes.

3. The computer system as in claim 1, wherein the power controller controls power consumption of a given one of the plurality of compute nodes by modulating the one of the plurality of power control signals provided to the given compute node, wherein a first state of the signal configures the given compute node to operate in a reduced power state, and a second state of the signal configures the given compute node not to operate in the reduced power state.

4. The computer system as in claim 1, wherein the power controller is configured to change a coefficient of a power control loop that controls compute node power consumption based on a number of compute nodes installed in the enclosure.

5. The computer system as in claim 1, wherein the power controller is configured to retrieve power supply efficiency data from a power supply coupled to the power controller, and based on the retrieved efficiency data, determine an amount of alternating current (“

AC”

) power drawn by the power supply.

6. The computer system as in claim 1, wherein the power controller is configured to reduce the amount of power consumed by at least one of the plurality of compute nodes based on a total power consumed by the plurality of compute nodes exceeding a predetermined limit.

7. A method, comprising:

measuring, by a power controller, an amount of power being consumed by each of a plurality of compute nodes installed in an enclosure;

determining, by the power controller, whether a total amount of power being consumed in the enclosure exceeds a predetermined limit; and

reducing, by the power controller, power consumption of at least one of the plurality of compute nodes based on the determination of total power being consumed.

8. The method of claim 7, further comprising determining, by the power controller, an amount of power consumed by non-compute node devices installed in the enclosure.

9. The method of claim 7, further comprising:

determining, by the power controller, a power output capacity for each power supply providing power to the enclosure;

reducing, by the power controller, power consumption of at least one of the plurality of compute nodes based on the determination of power supply output capacity.

10. The method of claim 7, further comprising:

retrieving power supply efficiency information from a power supply providing power to the enclosure;

determining an amount of alternating current (“

AC”

) power drawn by the power supply based on the efficiency information; and

reducing, by the power controller, power consumption of at least one of the plurality of compute nodes based on the determination of AC power drawn by the power supply.

11. The method of claim 7, further comprising changing, by the power controller, a power control coefficient responsive to a change in the number of compute nodes installed in the enclosure.

12. A power controller, comprising:

a processor;

a software system that when executed causes the processor to limit an amount of power consumed by at least one of a plurality of compute nodes removably installed in an enclosure comprising the power controller; and

circuitry, separate from each of the plurality of compute nodes, configured to individually measure the power consumed each of the plurality of compute nodes;

wherein the power controller is configured to control a total amount of power consumed within the enclosure.

13. The power controller of claim 12, wherein the software system causes the processor to measure an amount of current flowing into each of the plurality of compute nodes and to determine whether a total current flowing into the plurality of compute nodes exceeds a predetermined maximum amount of current.

14. The power controller of claim 12, wherein the software system causes the processor to estimate an amount of alternating current (“

AC”

) flowing into a power supply providing power to the enclosure, to determine whether a total amount of AC current flowing into power supplies providing power to the enclosure exceeds a predetermined maximum amount, and responsive to the determination, to reduce power consumption of at least one of the plurality of compute nodes.

15. The power controller of claim 12, wherein the software system causes the processor to modify a coefficient of a power control loop based on a change in a number of compute nodes installed in the enclosure.