TESTING METHOD FOR SEMICONDUCTOR INTEGRATED ELECTRONIC DEVICES AND CORRESPONDING TEST ARCHITECTURE
First Claim
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1. A method, comprising:
- testing a device having an integrated testing circuit using a tester, the testing including;
sending at least some of messages, instructions, test signals, and information exclusively from said tester to said device without sending any messages, instructions, test signals, and information from the device to the testing circuit.
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Abstract
A testing method is described of at least one device provided with an integrated testing circuit and in communication with at least one tester where messages/instructions/test signals/information are exclusively sent from the tester to the device . A testing architecture is also described for implementing this testing method.
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Citations
22 Claims
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1. A method, comprising:
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testing a device having an integrated testing circuit using a tester, the testing including; sending at least some of messages, instructions, test signals, and information exclusively from said tester to said device without sending any messages, instructions, test signals, and information from the device to the testing circuit. - View Dependent Claims (2, 3, 4, 5)
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6. A testing architecture, comprising:
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a tester; and a device associated with the tester and including; a circuit to be tested; an integrated testing circuit coupled to the circuit to be tested, the integrated testing circuit including; an interface configured to receive from the tester an awaited response signal corresponding to a condition of correct operation of said circuit a comparator configured to compare said awaited response signal and an output response of said circuit; and a test controller configured to generate a result information having a first value in case of correspondence between said output response with said awaited response signal, and a second value in case of non-correspondence between said output response and said awaited response signal. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A device configured to be communicatively coupled with a tester, comprising:
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a circuit to be tested; an integrated testing circuit coupled to the circuit to be tested, the integrated testing circuit including; an interface configured to receive from the tester an awaited response signal corresponding to a condition of correct operation of said circuit a comparator configured to compare said awaited response signal and an output response of said circuit; and a test controller configured to generate a result information having a first value in case of correspondence between said output response with said awaited response signal, and a second value in case of non-correspondence between said output response and said awaited response signal. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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Specification