LOW POWER INVERSION SCHEME WITH MINIMIZED NUMBER OF OUTPUT TRANSITIONS

• US 20120081347A1
• Filed: 09/30/2010
• Published: 04/05/2012
• Est. Priority Date: 09/30/2010
• Status: Abandoned Application

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Kim, Taesung
• Application Number:
  US12/895,717
• Publication Number:
  US 20120081347A1
• Time in Patent Office: Days
• US Class Current: 345/211
• CPC Class Codes: G09G 2310/0213 controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
• CPC Class Codes: G09G 2310/0224 Details of interlacing
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A method and system for an inversion driving scheme for pixels in a display. Column drivers may drive first voltages to columns of a pixel array in a display during a first period of a frame and drive inverses of the first voltages to columns of the pixel array during a second period of a frame. Row drivers may alternately drive even and odd rows during the first and seconds periods. Additionally, data for display on the display may be arranged such that data is transmitted to the odd and even rows of pixels in conjunction with the alternate activation of the rows and columns. This data rearrangement may be accomplished through the use of a graphics processing unit or local frame buffer coupled with a timing controller.

Claims

1. A display comprising:

a liquid crystal display panel including an array of pixels formed into a plurality of odd rows, a plurality of even rows, a plurality of odd columns, and a plurality of even columns;

a column driver coupled to the liquid crystal display panel and configured to drive a plurality of output signals to the plurality of odd columns of the array of pixels; and

a timing controller configured to transmit a first column driver control signal to the column driver, wherein the column driver is configured to generate a first output signal of the plurality of output signals based on the column driver control signal such that the first output signal is driven to a first voltage as the first output signal is transmitted to the plurality of odd rows of the plurality of odd columns of the array of pixels and subsequently the first output signal is driven to a second voltage opposite in polarity of the first voltage as the first output signal is transmitted to the plurality of even rows of the plurality of odd columns of the array of pixels.

2. The display of claim 1, wherein the timing controller is configured to transmit a second column driver control signal to the column driver, wherein the column driver is configured to generate a second output signal based on the second column driver control signal such that the second output signal is driven to the second voltage as the output signal is transmitted to the plurality of odd rows of the even columns of the pixel array and subsequently the second output signal is driven to the first voltage as the second output signal is transmitted to the plurality of even rows of the second column of the pixel array.

3. The display of claim 2, wherein at a time subsequent to the transmission of the first and second column driver control signals, the timing controller is configured to retransmit the first and second column driver control signals to the column driver, wherein the column driver is configured to generate and transmit the first output signal to the odd columns of the array of pixels and generate and transmit the second output signal to the even columns of the array of pixels.

4. The display of claim 2, wherein the timing controller is configured to transmit the first column driver control signal and the second column driver control signal concurrently.

5. The display of claim 2, wherein the timing controller is configured to transmit the second column driver control signal immediately subsequent to transmission of the first column driver control signal.

6. The display of claim 2, comprising a respective column driver for each of the odd and even columns of the pixel array.

7. The display of claim 2, comprising a frame buffer coupled to the timing controller and configured to store image data for transmission to the liquid crystal display panel for generation of images on the display.

8. The display of claim 7, wherein the timing controller is configured to retrieve first image data from the frame buffer corresponding to pixels in the plurality of odd rows of the plurality of odd columns and subsequently retrieve image data corresponding to pixels in the plurality of even rows of the plurality of odd columns from the frame buffer.

9. The display of claim 8, wherein the timing controller is configured to retrieve second image data from the frame buffer corresponding to pixels in the plurality of odd rows of the plurality of even columns and subsequently retrieve image data corresponding to pixels in the plurality of even rows of the plurality of even columns from the frame buffer.

10. An electronic device comprising:

a graphics processing unit comprising a processor configured to generate image data and control signals; and

a display coupled to the graphics processing unit and configured to receive the image data and control signals and to display the image data, wherein the display comprises;

a liquid crystal display panel including an array of pixels formed into a plurality of odd rows, a plurality of even rows, a plurality of odd columns, and a plurality of even columns; and

a plurality column drivers, wherein each column driver is coupled to a respective one of the columns of the array of pixels, wherein the plurality of column drivers coupled to the plurality of odd columns are configured to transmit a first output signal at first voltage to the plurality of odd rows of the plurality of odd columns and subsequently transmit a second output signal at a voltage opposite in polarity of the first voltage to the plurality of even rows of the plurality of odd columns of the array of pixels.

11. The electronic device of claim 10, wherein the plurality of column drivers coupled to the plurality of even columns are configured to transmit the second output signal to the plurality of odd rows of the plurality of even columns and subsequently transmit the first output signal to the plurality of even rows of the plurality of even columns of the array of pixels.

12. The electronic device of claim 10, wherein plurality of column drivers are configured to receive the control signals from the graphics processing unit and to generate the first and second output signals based on the control signals.

13. The electronic device of claim 10, comprising a frame buffer coupled to the graphics processing unit and configured to store the image data prior to transmission to the display.

14. The electronic device of claim 12, wherein the graphics processing unit is configured to retrieve first image data from the frame buffer corresponding to pixels in the plurality of odd rows of the plurality of odd columns and subsequently retrieve image data from the frame buffer corresponding to pixels in the plurality of even rows of the plurality of odd columns.

15. The electronic device of claim 14, wherein the graphics processing unit is configured to retrieve stored dummy image data from the frame buffer subsequent to retrieving image data from the frame buffer corresponding to the pixels in the plurality of odd rows and prior to retrieving image data from the frame buffer corresponding to the pixels in the plurality of even rows for the plurality of odd columns.

17. The display of claim 15, wherein the column driver is configured to transmit the second output signal to odd rows of immediately adjacent columns of the first column and to transmit the first output signal to even rows of the immediately adjacent columns of the first column.

18. The display of claim 15, wherein the column driver is configured to subsequently transmit the first output signal to the plurality of even rows of the first column of the plurality of odd columns and to subsequently transmit the second output signal to the plurality of odd rows of the first column of the plurality of odd columns.

16. A display comprising:

a liquid crystal display panel including an array of pixels formed into a plurality of odd rows, a plurality of even rows, a plurality of odd columns, and a plurality of even columns; and

a column driver configured to transmit a first output signal at first voltage to the plurality of odd rows of a first column of the plurality of odd columns and to subsequently transmit a second output signal at a voltage opposite in polarity of the first voltage to the plurality of even rows of the first column of the plurality of odd columns.

19. A method comprising:

transmitting from a first column driver a first output signal at first voltage to a plurality of odd rows of a first column of a liquid crystal display pixel array and subsequently transmitting from the first column driver a second output signal at a voltage opposite in polarity of the first voltage to a plurality of even rows of the first column of the liquid crystal display pixel array.

20. The method of claim 19, comprising transmitting the second output signal to odd rows of immediately adjacent columns of the first column of the liquid crystal display pixel array and transmitting the first output signal to even rows of the immediately adjacent columns of the first column.

21. The method of claim 19, comprising subsequently transmitting from the first column driver the first output signal to the plurality of even rows of the first column of the plurality of odd columns and subsequently transmitting from the first column driver the second output signal to the plurality of odd rows of the first column of the plurality of odd columns.