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NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

  • US 20120086057A1
  • Filed: 10/04/2011
  • Published: 04/12/2012
  • Est. Priority Date: 10/06/2010
  • Status: Active Grant
First Claim
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1. A semiconductor memory device, comprising:

  • a gate insulating layer formed over first and second areas of a semiconductor substrate, wherein the first area is for forming a select transistor and the second area is for forming a memory cell;

    a first conductive layer pattern for the select transistor and the memory cell formed over the gate insulating layer over the first and second areas;

    a dielectric layer formed over the first conductive layer pattern over the first and second areas;

    a second conductive layer pattern formed on the dielectric layer over the first conductive layer pattern for the memory cell; and

    a select line having a lower resistance than the second conductive layer pattern and coupled to the first conductive layer pattern for the select transistor.

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