METHOD FOR DEPOSITING A DIELECTRIC ONTO A FLOATING GATE FOR STRAINED SEMICONDUCTOR DEVICES
First Claim
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24. A semiconductor device having a semiconductor body, the semiconductor device comprising:
- a floating gate device;
a second device of first dopant type, the first dopant type being n-type such that the second device comprises an n-type metal oxide semiconductor (NMOS) device;
a third device of a second dopant type, wherein the second dopant type is p-type such that the third device comprises a p-type metal oxide semiconductor (PMOS) device, the third device being coupled between the floating gate device and the second device;
a first stress layer deposited above at least the second device;
a second stress layer deposited above at least the third device;
a dielectric layer deposited above the floating gate device after depositing the first and second stress layers; and
an etch stop layer fabricated above the first stress layer, second stress layer, and the dielectric layer.
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Abstract
A method for forming a semiconductor device and a corresponding device are provided. The method includes forming a floating gate device in a process with dual strain layers, and an etch stop layer. An oxide is formed between the floating gate device and a nitride layer above the floating gate.
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Citations
40 Claims
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24. A semiconductor device having a semiconductor body, the semiconductor device comprising:
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a floating gate device; a second device of first dopant type, the first dopant type being n-type such that the second device comprises an n-type metal oxide semiconductor (NMOS) device; a third device of a second dopant type, wherein the second dopant type is p-type such that the third device comprises a p-type metal oxide semiconductor (PMOS) device, the third device being coupled between the floating gate device and the second device; a first stress layer deposited above at least the second device; a second stress layer deposited above at least the third device; a dielectric layer deposited above the floating gate device after depositing the first and second stress layers; and an etch stop layer fabricated above the first stress layer, second stress layer, and the dielectric layer. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 37, 38)
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36-1. The semiconductor device of claim 36, further comprising a conductive film deposited atop the dielectric layer above the floating gate device, wherein the conductive film comprises a doped poly silicon or a metal.
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39. A semiconductor device formed on a substrate, the semiconductor device comprising:
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a PMOS device having a compressive film thereover; an NMOS device having a tensile film thereover; a salicide block layer at least partially comprised of nitride; and a floating gate device having an SiO2 dielectric layer deposited thereon, the salicide block layer being deposited at least on the floating gate device, such that the SiO2 dielectric layer is positioned atop the floating gate device and beneath any of the nitride deposited on the floating gate device; and an etch stop layer deposited over the PMOS, NMOS, and floating gate devices.
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40. A semiconductor device formed on a substrate, the semiconductor device comprising:
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a PMOS device having a compressive film thereover; an NMOS device having a tensile film thereover; a floating gate device having an oxide film and a conductive film deposited thereon, the conductive film being formed over the oxide film and beneath any nitride deposited on the floating gate device; and an etch stop layer over the NMOS, PMOS, and floating gate devices formed in the substrate.
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Specification