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INTEGRATED JITTER COMPLIANT CLOCK SIGNAL GENERATION

  • US 20120086491A1
  • Filed: 10/07/2010
  • Published: 04/12/2012
  • Est. Priority Date: 10/07/2010
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a plurality of adjacent Phase Locked Loops (PLLs) to provide respective PLL output signals having respective different frequencies; and

    a clock unit operatively coupled to receive the respective PLL output signals and to generate from the PLL output signals respective clock signals, the respective clock signals having closely spaced frequencies.

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