SEMICONDUCTOR PACKAGE AND IMPLEMENTATION STRUCTURE OF SEMICONDUCTOR PACKAGE

• US 20120091572A1
• Filed: 06/22/2009
• Published: 04/19/2012
• Est. Priority Date: 06/22/2009
• Status: Abandoned Application

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: Shirase, Takashi, Hamaguchi, Tsuneo, Sugiura, Ikio, Sakamoto, Hiroo, Iwata, Masaki, Okamuro, Takashi
• Application Number:
  US13/379,930
• Publication Number:
  US 20120091572A1
• Time in Patent Office: Days
• US Class Current: 257/676
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/45139 Silver (Ag) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/055 the leads having a passage through the base H01L23/057 takes precedence
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/145 Organic substrates, e.g. plastic
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 23/562 Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15162 : Top view
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H05K 2201/10727 : Leadless chip carrier [LCC], e.g. chip-modules for cards
• CPC Class Codes: H05K 3/3442 : having edge contacts, e.g. leadless chip capacitors, chip carriers
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

The semiconductor package includes a package wiring board having an element housing recessed portion on its top surface to house a semiconductor element; multiple side electrodes which are arranged on the outer side surface of the package wiring board and soldered to multiple motherboard electrodes arranged on a motherboard; a semiconductor element fixed onto the bottom surface of the element housing recessed portion; and an element electrode arranged on the bottom of the element housing recessed portion and electrically connected to the semiconductor element and the side electrodes. The package wiring board has a multilayered structure in which woven fabric and a resin adhesive layer are alternately laminated, and the resin adhesive layer is formed of a resin adhesive that contains inorganic filler particles.

Claims

1. A semiconductor package comprising:

a package wiring board which has an element housing recessed portion on a top surface thereof for housing a semiconductor element;

a plurality of side electrodes which are arranged on outer side surfaces of the package wiring board and soldered to a plurality of motherboard electrodes arranged on a motherboard;

a semiconductor element which is fixed onto a bottom surface of the element housing recessed portion; and

an element electrode arranged on the bottom surface of the element housing recessed portion and electrically connected to the semiconductor element and the side electrodes, wherein

the package wiring board has a multilayered structure in which woven fabric and a resin adhesive layer are alternately laminated; and

the resin adhesive layer is formed of a resin adhesive that contains inorganic filler particles.

2. The semiconductor package according to claim 1, wherein a step portion is arranged on an inner side surface of the element housing recessed portion at same level as a top surface of the semiconductor element, and the element electrode is arranged on a top surface of the step portion.

3. The semiconductor package according to claim 1, further comprising a cover which is fixed on a top surface of the package wiring board to partially or entirely cover an opening of the element housing recessed portion.

4. The semiconductor package according to claim 1, wherein the element housing recessed portion is partially or entirely filled with resin.

5. The semiconductor package according to claim 1, wherein

the motherboard is a glass epoxy print wiring board;

the solder is lead-free solder; and

a thermal expansion coefficient of the package wiring board in a direction of lamination is determined between 15×

10<sup>−

6</sup> and 40×

10<sup>−

6</sup> 1/K.

6. The semiconductor package according to claim 1, wherein

the motherboard is a glass epoxy print wiring board;

the solder is lead-free solder; and

a content of the inorganic filler particles in the resin adhesive layer is 30 to 80 weight percent.

7. A semiconductor package implementation structure comprising:

a semiconductor package comprising;

a package wiring board which has an element housing recessed portion on a top surface thereof for housing a semiconductor element;

a plurality of side electrodes which are arranged on outer side surfaces of the package wiring board and soldered to a plurality of motherboard electrodes arranged on a motherboard;

a semiconductor element which is fixed onto a bottom surface of the element housing recessed portion; and

an element electrode arranged on the bottom surface of the element housing recessed portion and electrically connected to the semiconductor element and the side electrodes, wherein

the package wiring board has a multilayered structure in which woven fabric and a resin adhesive layer are alternately laminated; and

the resin adhesive layer is formed of a resin adhesive that contains inorganic filler particles;

a motherboard on which the semiconductor package is mounted;

a plurality of motherboard electrodes which are arranged on a surface of the motherboard and attached to the side electrodes by use of solder, wherein

the side electrodes and the motherboard electrodes are arranged in such a manner that surfaces extending from the side electrodes cross the motherboard electrodes; and

the solder is spread and becomes solderable between top surfaces of the motherboard electrodes and the side electrodes.

8. The semiconductor package implementation structure according to claim 7, wherein

the side electrodes are each provided by integrally forming a side portion arranged on the outer side surface of the package wiring board and a bottom portion arranged on a bottom surface of the package wiring board;

the side electrodes and the motherboard electrodes are arranged in such a manner that surfaces extending from the side portions of the side electrodes cross the motherboard electrodes, and inner end surfaces of the bottom portions of the side electrodes are positioned inside with respect to inner end surfaces of the motherboard electrodes; and

the solder is spread and becomes solderable between the top surfaces and the inner end surfaces of the motherboard electrodes and the side electrodes.

9. The semiconductor package implementation structure according to claim 7, further comprising a lens mounted on the top surface of the package wiring board,

wherein the semiconductor element is a light emitting semiconductor element.