Building, Transmitting, and Receiving Frame Structures in Power Line Communications
First Claim
1. A computing device comprising:
- a processor; and
a memory coupled to the processor, wherein the memory is configured to store program instructions, and wherein the program instructions are executable by the processor to cause the computing device to;
generate a chirp sequence having a bandwidth selected, at least in part, by subtracting an excess bandwidth parameter from a low nominal frequency and adding the excess bandwidth parameter to a high nominal frequency;
extract a phase angle of a frequency-domain version of the chirp sequence to obtain a flattened frequency spectrum;
create a phase quantized sequence based, at least in part, upon the flattened frequency spectrum; and
employ the phased quantized sequence as a symbol to generate a power line communication (PLC) preamble portion of a PLC frame.
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Accused Products
Abstract
Systems and methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols based on a chirp signal that yields a low peak-to-average power ratio (PAPR). According to some techniques, the preamble may be constructed with one or more different types and/or number of symbols configured to identify a PLC domain operating in close physical proximity to another PLC domain. According to other techniques, one or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise. According to yet other techniques, a PLC detector may be capable of receiving and decoding two or more types of PLC frames (e.g., using different PLC standards).
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Citations
20 Claims
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1. A computing device comprising:
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a processor; and a memory coupled to the processor, wherein the memory is configured to store program instructions, and wherein the program instructions are executable by the processor to cause the computing device to; generate a chirp sequence having a bandwidth selected, at least in part, by subtracting an excess bandwidth parameter from a low nominal frequency and adding the excess bandwidth parameter to a high nominal frequency; extract a phase angle of a frequency-domain version of the chirp sequence to obtain a flattened frequency spectrum; create a phase quantized sequence based, at least in part, upon the flattened frequency spectrum; and employ the phased quantized sequence as a symbol to generate a power line communication (PLC) preamble portion of a PLC frame. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method comprising:
performing, by a power line communication (PLC) device, identifying a first symbol within a PLC preamble; inserting an instance of the first symbol at a predetermined location within a PLC header portion of a PLC frame; and causing the PLC frame to be transmitted over a power line. - View Dependent Claims (14, 15, 16)
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17. A power line communication (PLC) receiver device configured to:
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attempt to decode a preamble portion of a PLC frame using a first decoding technique, the preamble portion following one of a plurality of different PLC standards; in response to the attempt being successful, decode the PLC frame using the first decoding technique; and in response to the attempt being unsuccessful, attempt to decode the preamble portion of the PLC frame using a second decoding technique, the first and second decoding techniques each based upon a different PLC standard. - View Dependent Claims (18, 19, 20)
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Specification