CHAMBER MATCH USING IMPORTANT VARIABLES FILTERED BY DYNAMIC MULTIVARIATE ANALYSIS

• US 20120095582A1
• Filed: 10/15/2010
• Published: 04/19/2012
• Est. Priority Date: 10/15/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chang, Ming-Ching, Chen, Bing-Hung
• Granted Patent: US 8,489,218 B2
• Time in Patent Office: Days
• US Class Current: 700/103
• CPC Class Codes: G05B 13/024 in which a parameter or coefficient is automatically adjusted to optimise the performance
• CPC Class Codes: G05B 13/042 in which a parameter or coefficient is automatically adjusted to optimise the performance
• CPC Class Codes: G05B 19/41875 characterised by quality surveillance of production
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: G06Q 10/06 Resources, workflows, human or project management; Enterprise or organisation planning; Enterprise or organisation modelling

Abstract

The present disclosure provides a method of chamber match. The method includes identifying a golden chamber designed operable to implement a semiconductor process; identifying a reference chamber designed operable for the semiconductor process; and extracting a matching index of a processing chamber relative to the golden chamber and the reference chamber using a dynamic variable analysis.

Claims

1. A method of modifying a chamber in a semiconductor manufacturing facility, the method comprising:

identifying a first, golden chamber operable to implement a semiconductor process;

identifying a second, reference chamber operable for the semiconductor process;

extracting a matching index of a third, processing chamber relative to the golden chamber and the reference chamber using a dynamic variable analysis; and

modifying the third, processing chamber according to the matching index.

2. The method of claim 1, wherein the extracting a matching index of a processing chamber includes using a partial least square and discriminant analysis.

3. The method of claim 1, further comprising selecting variables of importance (VIPs) from the matching index.

4. The method of claim 3, further comprising identifying a hardware parameter for chamber setting based on the VIPs using design of experiments (DOE).

5. The method of claim 4, wherein the DOE includes one selected from the group consisting of a Taguchi method, response surface methodology, D-optimization, and combinations thereof.

6. The method of claim 4, further comprising adjusting the hardware parameter according to the DOE.

7. The method of claim 6, further comprising fine tuning a process parameter according to the DOE.

8. The method of claim 1, wherein the extracting the matching index of a processing chamber includes extracting the matching index as a function of time.

9. The method of claim 8, wherein the extracting the matching index of a processing chamber includes collecting manufacturing data from the processing chamber at various processing times.

10. A method, comprising:

identifying a golden chamber designed for a semiconductor process; and

extracting a matching index of a processing chamber using a dynamic variable analysis, wherein the extracting the matching index further includes;

extracting the matching index using a partial least square (PLS) model if metrology data is available;

extracting the matching index using a principal component analysis (PCA) model if the metrology data is not available and a reference chamber is not ready; and

extracting the matching index using a partial least square-discriminant analysis (PLS-DA) model if the metrology data is not available and the reference chamber is ready; and

modifying the processing chamber based on the matching index.

11. The method of claim 10, further comprising

selecting very important parameters (VIPs) from the matching index;

and

identifying a tunable parameter based on the VIPs using design of experiments (DOE).

12. The method of claim 11, wherein the DOE includes a procedure selected from the group consisting of a Taguchi method, response surface methodology, D-optimization, and combinations thereof.

13. The method of claim 11, wherein the selecting the VIPs comprising selecting a VIP if a filtering parameter VIP is greater than 1, in which the filtering parameter is defined as,

14. The method of claim 11, further comprising adjusting a hardware parameter of the processing chamber if a mismatch of the processing chamber is identified by the matching index.

15. The method of claim 14, further comprising fine tuning a processing parameter associated with the processing target chamber.

16. The method of claim 10, wherein the extracting the matching index includes dynamically collecting manufacturing data from at least one of hardware parameters of the processing chamber and process parameters associated with the processing chamber.

17. A system for chamber match, comprising:

a multivariate analysis (MVA) module designed to identify a matching index by performing a MVA model to dynamic manufacturing data from a processing chamber and being associated with a semiconductor process;

a variable of importance (VIP) module designed to identify VIP parameters from the matching index; and

a design of experiment (DOE) module designed to identify a tunable parameter from the VIP parameters using a DOE model.

18. The system of claim 17, wherein the MVA module further includes

a first sub-module for extracting the matching index using a partial least square (PLS) model and configured to be trigged when the metrology data is available;

a second sub-module for extracting the matching index using a principal component analysis (PCA) model and configured to be trigged when the metrology data is not available and a reference chamber is not ready; and

a third sub-module for extracting the matching index using a partial least square-discriminant analysis (PLS-DA) model and configured to be trigged when the metrology data is not available and the reference chamber is ready.

19. The system of claim 17, further comprising

a data collector coupled with a metrology tool to collect product parameter data and coupled with the processing chamber to collect hardware parameter data and process parameter data.

20. The system of claim 17, further comprising a database having data associated with at least a subset of a PLS model, a PCA model, a PLS-DA model, a batch analysis model, a Taguchi method, response surface methodology, and D-optimization method.