THIN FILM TRANSISTOR AND DISPLAY DEVICE USING THE SAME

• US 20120097965A1
• Filed: 03/25/2011
• Published: 04/26/2012
• Est. Priority Date: 10/22/2010
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Park, Ji-Yong, Park, Kyung-Min, Shin, Jae-Min
• Granted Patent: US 9,171,956 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

In a thin film transistor and a display device provided with the same, a thin film transistor according to an exemplary embodiment includes: a semiconductor layer including a channel region, a source region, a drain region, a light-doped source region, and a light-doped drain region; a gate electrode overlapping the channel region; a source electrode contacting the source region; and a drain electrode contacting the drain region. The channel region includes a main channel portion, a source channel portion, and a drain channel portion, and the source channel portion and the drain channel portion are extended from the main channel portion and separated from each other. The light-doped source region is disposed between the source channel portion and the source region and the light-doped drain region is disposed between the drain channel portion and the drain region.

Claims

1. A thin film transistor comprising:

a semiconductor layer comprising a channel region, a source region, a drain region, a light-doped source region, and a light-doped drain region;

a gate electrode overlapping the channel region;

a source electrode contacting the source region; and

a drain electrode contacting the drain region,

wherein;

the channel region comprises a main channel portion, a source channel portion, and a drain channel portion,

the source channel portion and the drain channel portion are extended from the main channel portion and separated from each other,

the light-doped source region is disposed between the source channel portion and the source region, and

the light-doped drain region is disposed between the drain channel portion and the drain region.

2. The thin film transistor of claim 1, wherein the semiconductor layer is a patterned polycrystalline silicon film having a plurality of crystallization protrusions arranged along a crystallization protrusion line.

3. The thin film transistor of claim 2, wherein the polycrystalline silicon film is formed by irradiating laser beams to an amorphous silicon layer.

4. The thin film transistor of claim 2, wherein the crystallization protrusions remain in the semiconductor layer.

5. The thin film transistor of claim 2, wherein the crystallization protrusion line is formed along a direction crossing long sides of the light-doped source region and the light-doped drain region.

6. The thin film transistor of claim 2, wherein a direction in which the source channel portion and the drain channel portion are extended from the main channel portion is angled with a length direction of the crystallization protrusion line by an angle at 0 or 45 degrees or between 0 and 45 degrees.

7. The thin film transistor of claim 1, wherein the channel region of the semiconductor is bent two times.

8. The thin film transistor of claim 1, wherein the source channel portion and the drain channel portion have a length direction that is different from that of the main channel portion.

9. The thin film transistor of claim 1, further comprising:

a gate insulating layer disposed between the semiconductor layer and the gate electrode; and

an interlayer insulating layer disposed between the gate electrode and the source electrode, and between the gate electrode and the drain electrode,

wherein the source electrode and the drain electrode respectively contact the source region and the drain region through the interlayer insulating layer and the gate insulating layer.

10. A display device comprising:

the thin film transistor of claim 1; and

an organic light emitting element connected to the thin film transistor.

11. A display device comprising:

the thin film transistor of claim 1;

a pixel electrode connected with the thin film transistor; and

a liquid crystal layer formed on the pixel electrode.