Semiconductor Device and Associated Fabrication Method

• US 20120098058A1
• Filed: 10/21/2011
• Published: 04/26/2012
• Est. Priority Date: 10/22/2010
• Status: Active Grant

• Current Assignee: Chengdu Monolithic Power Systems Company Limited (Monolithic Power Systems Incorporated)
• Original Assignee: Chengdu Monolithic Power Systems Company Limited (Monolithic Power Systems Incorporated)
• Inventors: Zhang, Lei, Li, Tiesheng
• Granted Patent: US 8,716,784 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device and a method for forming the semiconductor device wherein the semiconductor comprises: a trench MOSFET, formed on a semiconductor initial layer, comprising a well region, wherein the semiconductor initial layer has a first conductivity type and wherein the well region has a second conductivity type; an integrated Schottky diode next to the trench MOSFET, comprising a anode metal layer contacted to the semiconductor initial layer; a trench isolation structure, coupled between the trench MOSFET and integrated Schottky diode, configured to resist part of lateral diffusion from the well region; wherein the well region comprises an overgrowth part which laterally diffuses under the trench isolation structure and extends out of it.

Claims

1. A semiconductor device, comprising:

a trench metal-oxide semiconductor field effect transistor (MOSFET), formed on a semiconductor initial layer, the trench MOSFET comprising a well region on the semiconductor initial layer, wherein the semiconductor initial layer has a first conductivity type and wherein the well region has a second conductivity type;

a Schottky diode, comprising an anode metal layer, wherein the anode metal layer is above and contacting the semiconductor initial layer; and

a trench isolation structure, coupled between the trench MOSFET and the Schottky diode, configured to block part of the well region from laterally diffusing;

wherein the well region comprises an overgrowth part under the trench isolation structure, and wherein the overgrowth part laterally diffuses and extends over the trench isolation structure.

2. The semiconductor device according to claim 1, wherein the first conductivity type is N-type and wherein the second conductivity type is P-type.

3. The semiconductor device according to claim 1, wherein the trench isolation structure comprises a gate structure.

4. The semiconductor device according to claim 1, wherein the trench isolation structure comprises an insulation material.

6. The semiconductor device according to claim 1, wherein the trench MOSFET further comprises a source region and a source electrode, wherein the source region has the first conductivity type, and wherein the source electrode is electrically coupled to the anode metal layer.

7. The semiconductor device according to claim 6, wherein the source electrode extends through the source region and into the well region, wherein the trench MOSFET further comprises a heavily doped region in the well region, wherein the heavily doped region has the second conductivity type and wherein the heavily doped region is around the end part of the source electrode.

8. The semiconductor device according to claim 1, wherein the trench MOSFET further comprises a trench gate, wherein the depth of the trench gate is larger than the depth of the trench isolation structure.

9. The semiconductor device according to claim 1, wherein the semiconductor initial layer comprises a semiconductor substrate, wherein the semiconductor substrate is utilized as a drain region of the trench MOSFET, and wherein the semiconductor substrate is further utilized as a cathode region of the Schottky diode.

5. The semiconductor device according to claim 5, wherein the insulation material is silicon oxide.

10. A semiconductor device, comprising

a semiconductor initial layer, having a first conductivity type;

a well region, formed on the semiconductor initial layer, the well region having a second conductivity type;

a source region, formed on the surface of the well region, the source region having a first conductivity type;

a first trench, stretching through the well region and extending to the semiconductor initial layer, the first trench comprising a gate structure;

a second trench next to the well region, the second trench comprising a trench isolation structure configured to block part of the well region from laterally diffusing; and

an anode metal layer formed on part of the semiconductor initial layer, wherein the anode metal layer is between two second trenches;

wherein the well region comprises an overgrowth part under the second trench, and wherein the overgrowth part laterally diffuses and extends over the second trench.

11. The semiconductor device according to claim 10, wherein a gate structure is further formed in the second trench.

12. The semiconductor device according to claim 10, wherein an insulation material layer is further formed in the second trench.

13. The semiconductor device according to claim 10, wherein the first trench is deeper than the second trench.

14. The semiconductor device according to claim 10, further comprising:

a source electrode, stretching through the source region and into the well region, wherein the source electrode is electrically coupled to the anode metal layer; and

a heavily doped region in the well region, wherein the heavily doped region has the second conductivity type and wherein the heavily doped region is around the end part of the source electrode.

15. A method for forming a semiconductor device, comprising:

forming a first trench in a semiconductor initial layer, wherein the semiconductor initial layer has a first conductivity type;

forming a second trench in the semiconductor initial layer, wherein the second trench is shallower than the first trench;

forming a gate structure in the first trench;

forming a trench isolation structure in the second trench;

implanting dopants between the first trench and the second trench in the initial semiconductor layer region, and diffusing to form a well region, wherein the well region comprises an overgrowth part which laterally diffuses under the second trench and extends over the second trench, and wherein the well region has a second conductivity type;

forming a source region on the upper surface of the well region, wherein the source region has a first conductivity type;

forming a source electrode contacting the source region; and

forming an anode metal layer on part of the semiconductor initial layer between two adjacent second trenches.

16. The method for forming a semiconductor device according to claim 15, wherein forming a first trench comprises:

forming an additional second trench; and

deepening the additional second trench to form the first trench.

17. The method for forming a semiconductor device according to claim 15, wherein forming a trench isolation structure comprises forming a gate structure, and wherein the trench isolation structure and the gate structure in the first trench are formed simultaneously.

18. The method for forming a semiconductor device according to claim 15, wherein forming a trench isolation structure comprises filling insulation material into the second trench.

19. The method for forming a semiconductor device according to claim 15, wherein forming the source electrode further comprises coupling the source electrode to the anode metal layer.

20. The method for forming a semiconductor device according to claim 19, wherein forming the source electrode further comprises:

stretching the source electrode through the source region and into the well region; and

forming a heavily doped semiconductor region having the second conductivity type in the well region, wherein the heavily doped semiconductor region is formed around the end part of the source electrode.