METHOD OF READING DATA IN A NON-VOLATILE MEMORY DEVICE

• US 20120099391A1
• Filed: 12/30/2011
• Published: 04/26/2012
• Est. Priority Date: 05/26/2008
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: PARK, Jin Su
• Granted Patent: US 8,760,951 B2
• Time in Patent Office: Days
• US Class Current: 365/203
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3436 Arrangements for verifying correct programming or erasure

Abstract

A method of reading data in a non-volatile memory device compensates for a change in a reading/verifying result in accordance with a change of temperature. The method includes sensing a temperature of a memory cell, setting a first voltage and a second voltage of a bit line sensing signal in accordance with the sensed temperature so that a difference of the first voltage and the second voltage is increased as the temperature increases, precharging a bit line in accordance with the set first voltage, and sensing data of the memory cell in accordance with the set second voltage. The method may read/verify data constantly even though a temperature is changed.

Claims

1. A method of reading data in a non-volatile memory device, the method comprising:

sensing a temperature of a memory cell;

setting a first voltage and a second voltage of a bit line sensing signal in accordance with the sensed temperature so that a difference of the first voltage and the second voltage is increased as the temperature increases;

precharging a bit line in accordance with the set first voltage; and

sensing data of the memory cell in accordance with the set second voltage.

2. The method of claim 1, wherein the first voltage is increased as the temperature increases.

3. The method of claim 1, wherein the second voltage is reduced as the temperature increases.

4. The method of claim 1, wherein the first voltage is reduced as the temperature decreases.

5. The method of claim 1, wherein the second voltage is increased as the temperature decreases.

6. A non-volatile memory device, comprising:

a cell string comprising a plurality of memory cells, wherein the cell string is coupled to a bit line;

a temperature sensor configured to sense a temperature of the memory cells;

a bit line sensing circuit configured to precharge the bit line in response to a first bit line sensing signal and sense a voltage level of the bit line to sense data of the memory cell in response to a second bit line sensing signal; and

a control circuit configured to output the first bit line sensing signal of a first voltage and the second bit line sensing signal of a second voltage in accordance with the sensed temperature, wherein the difference of the first voltage and the second voltage is increased as the temperature increases.

7. The non-volatile memory device of claim 6, further comprising:

a sensing node precharging circuit configured to precharge a sensing node in response to a precharge signal, wherein the bit line sensing circuit couples the sensing node to the bit line in response to the first bit line sensing signal to precharge the bit line; and

a latch circuit configured to latch data of the memory cell in accordance with a voltage level of the sense node.

8. The non-volatile memory device of claim 7, wherein the latch circuit comprises:

a data latch configured to store data to be programmed to a memory cell or store data read from a memory cell;

a data setting circuit configured to input data to be stored in the data latch;

a sensing node sensing circuit configured to apply a ground voltage to a specific node of the data circuit in accordance with the voltage level of the sensing node; and

a data transmitting circuit configured to transmit the data stored in the data latch to the sensing node.

9. The non-volatile memory device of claim 6, wherein the first voltage is increased as the temperature increases.

10. The non-volatile memory device of claim 6, wherein the second voltage is reduced as the temperature increases.

11. The non-volatile memory device of claim 6, wherein the first voltage is reduced as the temperature decreases.

12. The non-volatile memory device of claim 6, wherein the second voltage is increased as the temperature decreases.

13. A method of reading data in a non-volatile memory device, the method comprising:

sensing a temperature of a memory cell;

setting a first voltage and a second voltage of a bit line sensing signal in accordance with the sensed temperature so that a difference of the first voltage and the second voltage is increased as the temperature is increased;

setting a time interval for evaluating a voltage level of a bit line in accordance with the sensed temperature;

precharging the bit line in accordance with the set first voltage;

evaluating the voltage level of the bit line during the set evaluation time interval; and

sensing data of the memory cell in accordance with the set second voltage.

14. The method of claim 13, wherein the evaluation time interval is reduced as the temperature increases.

15. The method of claim 13, wherein the evaluation time interval is increased as the temperature decreases.

16. The method of claim 13, further comprising discharging the voltage level of the bit line, wherein the voltage level of the bit line is increasingly discharged as the evaluation time interval increases.

17. The method of claim 13, wherein the first voltage is increased as the temperature increases.

18. The method of claim 13, wherein the second voltage is reduced as the temperature increases.

19. The method of claim 13, wherein the first voltage is reduced as the temperature decreases.

20. The method of claim 13, wherein the second voltage is increased as the temperature decreases.