FILM FOR SEMICONDUCTOR AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

• US 20120108012A1
• Filed: 05/31/2010
• Published: 05/03/2012
• Est. Priority Date: 07/09/2009
• Status: Abandoned Application

• Current Assignee: Sumitomo Bakelite Company Limited
• Original Assignee: Sumitomo Bakelite Company Limited
• Inventors: Yasuda, Hiroyuki, Hirano, Takashi, Oda, Naoya
• Application Number:
  US13/382,593
• Publication Number:
  US 20120108012A1
• Time in Patent Office: Days
• US Class Current: 438/113
• CPC Class Codes: C09J 2203/326 for bonding electronic components such as wafers, chips or semiconductors
• CPC Class Codes: C09J 2301/208 the adhesive layer being constituted by at least two or more adjacent or superposed adhesive layers, e.g. multilayer adhesive
• CPC Class Codes: C09J 7/38 Pressure-sensitive adhesives [PSA]
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/68336 involving stretching of the auxiliary support post dicing
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2224/274 by blanket deposition of the material of the layer connector
• CPC Class Codes: H01L 2224/27436 Lamination of a preform, e.g. foil, sheet or layer
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83191 wherein the layer connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/838 Bonding techniques
• CPC Class Codes: H01L 2224/92247 : the second connecting process involving a wire connector
• CPC Class Codes: H01L 24/27 : Manufacturing methods
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01059 : Praseodymium [Pr]
• CPC Class Codes: H01L 2924/01061 : Promethium [Pm]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: Y10T 428/15 : Sheet, web, or layer weakened to permit separation through thickness
• CPC Class Codes: Y10T 428/24777 : Edge feature
• CPC Class Codes: Y10T 428/2495 : Thickness [relative or absolute]
• CPC Class Codes: Y10T 428/24983 : Hardness
• CPC Class Codes: Y10T 428/265 : 1 mil or less

Abstract

A film for semiconductor includes a support film, a second adhesive layer, a first adhesive layer and a bonding layer which are laminated together in this order. This film for semiconductor is configured so that it supports a semiconductor wafer laminated on the bonding layer thereof when the semiconductor wafer is diced and the bonding layer is selectively peeled off from the first adhesive layer when the semiconductor elements obtained by the dicing are picked up. This film for semiconductor is characterized in that an average thickness of the second adhesive layer is in the range of 20 to 100 μm. This makes it possible to control cutting lines formed during the dicing so as to locate distal ends thereof within the first adhesive layer easily and reliably and to prevent defects which would be generated when the cutting lines come down to the support film.

Claims

1. A film for semiconductor comprising a bonding layer, at least one adhesive layer and a support film which are laminated together in this order, the film for semiconductor being adapted to be used for picking up chips obtained by laminating a semiconductor wafer onto a surface of the bonding layer opposite to the adhesive layer, and then dicing the semiconductor wafer together with the bonding layer in the laminated state into the chips,

wherein the adhesive layer includes a layer having an average thickness of 20 to 100 μ

m.

2. The film for semiconductor as claimed in claim 1, wherein the at least one adhesive layer comprises a plurality of adhesive layers including the layer having the average thickness of 20 to 100 μ

m.

3. The film for semiconductor as claimed in claim 2, wherein the plurality of adhesive layers includes a first adhesive layer positioned at a side of the semiconductor wafer as the layer having the average thickness of 20 to 100 μ

m, and a second adhesive layer provided between the first adhesive layer and the support film, the second adhesive layer having an adhesive property higher than that of the first adhesive layer.

4. The film for semiconductor as claimed in claim 3, wherein a peripheral edge of the bonding layer and a peripheral edge of the first adhesive layer are located inside a peripheral edge of the second adhesive layer, respectively.

5. The film for semiconductor as claimed in claim 3, wherein an average thickness of the second adhesive layer is smaller than that of the first adhesive layer.

6. The film for semiconductor as claimed in claim 3, wherein hardness of the second adhesive layer is smaller than that of the first adhesive layer.

7. The film for semiconductor as claimed in claim 3, wherein Shore D hardness of the first adhesive layer is in the range of 20 to 60.

8. The film for semiconductor as claimed in claim 1, wherein in the semiconductor wafer after being diced, in the case where adhesive strength measured when an edge portion of the chip is peeled off from the adhesive layer is defined as “

a (N/cm)” and

adhesive strength measured when a portion of the chip other than the edge portion thereof is peeled off from the adhesive layer is defined as “

b (N/cm)”

, a/b is in the range of 1 to 4.

9. The film for semiconductor as claimed in claim 8, wherein the adhesive strength “

b”

is in the range of 0.05 to 0.3 (N/cm).

10. The film for semiconductor as claimed in claim 1, wherein a region of a surface of the adhesive layer facing the bonding layer, above which the semiconductor wafer is to be laminated, has been, in advance, irradiated with an ultraviolet ray before the semiconductor wafer is laminated onto the film for semiconductor.

11. The film for semiconductor as claimed in claim 1, wherein the film for semiconductor is adapted to be used so that, when the semiconductor wafer and the bonding layer are diced by forming cutting lines, deepest points of the cutting lines are located within the layer having the average thickness of 20 to 100 μ

m.

12. A method for manufacturing a semiconductor device comprising:

a first step of laminating a semiconductor wafer onto the film for semiconductor defined by claim 1 so that the semiconductor wafer makes contact with the bonding layer to obtain a laminated body;

a second step of dicing the semiconductor wafer into a plurality of semiconductor elements by forming cutting lines into the laminated body from a side of the semiconductor wafer; and

a third step of picking up the chips each comprising the semiconductor element with the diced bonding layer,

wherein the cutting lines are formed so that deepest points thereof are located within the layer having the average thickness of 20 to 100 μ

m.

13. The method for manufacturing a semiconductor device as claimed in claim 12, wherein a cross sectional area of a distal end portion of each cutting line, which extends beyond an interface between the bonding layer and the adhesive layer, is in the range of 5×

10<sup>−

5</sup> to 300×

10<sup>−

5</sup> mm².