BUTTED SOI JUNCTION ISOLATION STRUCTURES AND DEVICES AND METHOD OF FABRICATION
First Claim
1. A structure, comprising:
- a silicon layer on a buried oxide layer of a silicon-on-insulator substrate;
a trench in said silicon layer extending from a top surface of said silicon layer into said silicon layer, said trench not extending to said buried oxide layer;
a doped region in said silicon layer between and abutting said buried oxide layer and a bottom of said trench, said first doped region doped to a first dopant concentration;
a first epitaxial layer, doped to a second dopant concentration, in a bottom of said trench;
a second epitaxial layer, doped to a third dopant concentration, on said first epitaxial layer in said trench; and
wherein said third dopant concentration is greater than said first and second dopant concentrations and said first dopant concentration is greater than said second dopant concentration.
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Accused Products
Abstract
A structure, a FET, a method of making the structure and of making the FET. The structure including: a silicon layer on a buried oxide (BOX) layer of a silicon-on-insulator substrate; a trench in the silicon layer extending from a top surface of the silicon layer into the silicon layer, the trench not extending to the BOX layer, a doped region in the silicon layer between and abutting the BOX layer and a bottom of the trench, the first doped region doped to a first dopant concentration; a first epitaxial layer, doped to a second dopant concentration, in a bottom of the trench; a second epitaxial layer, doped to a third dopant concentration, on the first epitaxial layer in the trench; and wherein the third dopant concentration is greater than the first and second dopant concentrations and the first dopant concentration is greater than the second dopant concentration.
39 Citations
25 Claims
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1. A structure, comprising:
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a silicon layer on a buried oxide layer of a silicon-on-insulator substrate; a trench in said silicon layer extending from a top surface of said silicon layer into said silicon layer, said trench not extending to said buried oxide layer; a doped region in said silicon layer between and abutting said buried oxide layer and a bottom of said trench, said first doped region doped to a first dopant concentration; a first epitaxial layer, doped to a second dopant concentration, in a bottom of said trench; a second epitaxial layer, doped to a third dopant concentration, on said first epitaxial layer in said trench; and wherein said third dopant concentration is greater than said first and second dopant concentrations and said first dopant concentration is greater than said second dopant concentration. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A field effect transistor, comprising:
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a silicon layer on a buried oxide layer of a silicon-on-insulator (SOI) substrate; first and second butted SOI junction isolations on opposite side of a channel region in said silicon layer, each butted SOI junction isolation comprising; a trench in said silicon layer extending from a top surface of said silicon layer into said silicon layer, said trench not extending to said buried oxide layer; a doped region in said silicon layer between and abutting said buried oxide layer and a bottom of said trench, said first doped region doped to a first dopant concentration; a first epitaxial layer, doped to a second dopant concentration, in a bottom of said trench; a second epitaxial layer, doped to a third dopant concentration, on said first epitaxial layer in said trench; and wherein said third dopant concentration is greater than said first and second dopant concentrations and said first dopant concentration is greater than said second dopant concentration; and a gate dielectric layer on a top surface of said silicon layer between said first and second butted SOI junction isolation; a gate electrode on said gate dielectric; wherein said doped region and said second epitaxial layers of said first and second butted SOI junction isolations are all doped a same dopant type and a body region of said silicon layer between said first and second butted junction SOI isolation is doped a second and opposite dopant type. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A method, comprising:
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providing a silicon layer on a buried oxide layer of a silicon-on-insulator substrate; etching a trench in said silicon layer extending from a top surface of said silicon layer into said silicon layer, said trench not extending to said buried oxide layer; ion implanting a dopant species into said silicon layer under said bottom of said trench to form a doped region in said silicon layer, said first doped region doped to a first concentration; performing a first epitaxial deposition to form a first epitaxial layer doped to a second concentration in a bottom of said trench; performing a second epitaxial deposition a second epitaxial layer doped to a third concentration on said first epitaxial layer in said trench; and wherein said third concentration is greater than said first and second concentrations and said first concentration is greater than said second concentration. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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Specification