Circuit and Method for Voltage Regulator Output Voltage Trimming

• US 20120112725A1
• Filed: 10/27/2011
• Published: 05/10/2012
• Est. Priority Date: 11/05/2010
• Status: Active Grant

• Current Assignee: Chengdu Monolithic Power Systems Company Limited (Monolithic Power Systems Incorporated)
• Original Assignee: Chengdu Monolithic Power Systems Company Limited (Monolithic Power Systems Incorporated)
• Inventors: Li, Yike, Zhou, Jiangyun
• Granted Patent: US 8,593,121 B2
• Time in Patent Office: Days
• US Class Current: 323/297
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit
• CPC Class Codes: H01C 17/22 adapted for trimming

Abstract

The present disclosure discloses a voltage regulator comprising a trimming circuit. The present disclosure also discloses a method for trimming an output voltage of a voltage regulator. In one embodiment the voltage regulator may comprise a power conversion module, a feedback and trimming module and a control module. The voltage regulator may be able to provide an output voltage that could be regulated to a plurality of output values, the feedback and trimming module may be able to trim the plurality of output values to their desired values successively and independently.

Claims

1. A voltage regulator comprising:

a power conversion module configured to receive an input voltage, and to convert the input voltage into an output voltage configurable to be regulated to a plurality of output values indexed from 1 to N, wherein N is a positive integer;

a feedback and trimming module comprising a plurality of voltage dividing devices coupled in series between the output voltage and ground, wherein the feedback and trimming module is configured to provide a plurality of feedback terminals indexed from 1 to N leading out from N different positions on the plurality of voltage dividing devices, and wherein the plurality of feedback terminals indexed from 1 to N are configured to provide a plurality of feedback voltages indexed from 1 to N respectively corresponding to the plurality of output values indexed from 1 to N; and

a control module configured to selectively receive one of the plurality of feedback voltages indexed by X a time, and to compare the received feedback voltage indexed by X with a reference signal to provide a control signal to the power conversion module, wherein the control signal represents an error between the received feedback voltage indexed by X and the reference signal, and wherein the power conversion module regulates the output voltage to the output value indexed by X corresponding to the received feedback voltage indexed by X in response to the control signal, and wherein X changes from 1 to N; and

wherein

the feedback and trimming module is further configured to successively trim the leading out positions of the plurality of feedback terminals indexed from 1 to N on the plurality of voltage dividing devices so as to successively trim the plurality of output values indexed from 1 to N to their desired values independently.

2. The voltage regulator of claim 1, wherein the feedback and trimming module comprises:

a group of resistive voltage dividing devices indexed from 1 to N+1 coupled in series between the output voltage and ground with a terminal of the resistive voltage dividing device indexed by 1 connected to ground and a terminal of the resistive voltage dividing device indexed by N+1 connected to the output voltage; and

a group of trimming units indexed from 1 to N configured to provide the plurality of feedback terminals indexed from 1 to N, wherein

the trimming unit indexed by X is coupled between the resistive voltage dividing device indexed by X and the resistive voltage dividing device indexed by X+1, and wherein

the trimming unit indexed by X is configured to provide the feedback terminal indexed by X at a predetermined leading out position before trimming, and wherein

the trimming unit indexed by X is further configured to trim the leading out position of the feedback terminal indexed by X on the trimming unit indexed by X so as to trim the output value indexed by X to its desired value, and wherein

X successively changes from 1 to N.

3. The voltage regulator of claim 2, wherein

the resistive voltage dividing device indexed by X has an equivalent resistance identified by R_X;

and wherein

the trimming unit indexed by X has an equivalent resistance identified by Δ

R_X; and

wherein

the trimming unit indexed by X is configured to trim the output value indexed by X in a trimming range related to the ratio between Δ

R_X and R_X.

4. The voltage regulator of claim 2, wherein the trimming unit indexed by X is configured to trim the output value indexed by X with a predetermined trimming step.

5. The voltage regulator of claim 2, wherein the trimming unit indexed by X comprises:

a first trimming branch having a first terminal coupled to the resistive voltage dividing device indexed by X and a second terminal coupled to the resistive voltage dividing device indexed by X+1, wherein the first trimming branch has a resistance identified by Δ

R_X; and

a second trimming branch comprising;

a first group of M+1 series coupled trimming resistors having a first terminal coupled to the feedback terminal indexed by X, and a second terminal coupled to the first terminal of the first trimming branch via a resistor identified by RS_X, wherein the first group of M+1 trimming resistors respectively have the resistances successively identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X;

a second group of M+1 series coupled trimming resistors having a first terminal coupled to the feedback terminal indexed by X, and a second terminal coupled to the second terminal of the first trimming branch via a resistor identified by RS_X, wherein the second group of M+1 trimming resistors respectively have the resistances successively identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X; and

2(M+1) trimming fuses correspondingly coupled in parallel with each of the trimming resistors;

wherein

M is a non-negative integer; and

wherein

M, M−

1, . . . , 0 are the trimming weighted index numbers for the M+1 series coupled trimming resistors respectively having the resistances successively identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X.

6. The voltage regulator of claim 5, wherein the resistive voltage dividing device indexed by X has an equivalent resistance identified by R_X;

and wherein the trimming unit indexed by X has a trimming range of

7. The voltage regulator of claim 5, wherein the resistive voltage dividing device indexed by X has an equivalent resistance identified by R_X;

and wherein the trimming unit indexed by X has a predetermined trimming step of

8. The voltage regulator of claim 5, wherein the resistance identified by Δ

R_X, is much smaller than each of the resistances identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X, and RS_X, and wherein the resistance identified by RS_X is much smaller than the total resistance of the M+1 series coupled trimming resistors identified by (2^M+2<sup>M−

1</sup>+ . . . +2⁰)RT_X.

9. The voltage regulator of claim 5, wherein the trimming unit indexed by X is configured to trim the leading out position of the feedback terminal indexed by X on the second trimming branch via selectively cutting off a plurality of trimming fuses coupled to a selected plurality of trimming resistors among the first group of M+1 trimming resistors and the second group of M+1 trimming resistors.

10. The voltage regulator of claim 5, wherein the trimming unit indexed by X is configured to trim the leading out position of the feedback terminal indexed by X on the second trimming branch via selectively cutting off a first plurality of trimming fuses coupled to a first plurality of selected trimming resistors among the first group of M+1 trimming resistors, and a second plurality of trimming fuses coupled to a second plurality of selected trimming resistors among the second group of M+1 trimming resistors, wherein the trimming weighted index numbers of the first plurality of selected trimming resistors and the trimming weighted index numbers of the second plurality of selected trimming resistors are complementary such that the total resistance contributed to the second trimming branch by the first group of M+1 trimming resistors and the second group of M+1 trimming resistors maintains at a resistance identified by (2^M+2^M−

1+ . . . 2⁰)RT_X during trimming.

11. A trimming circuit comprising:

an input terminal configured to receive an output voltage of a voltage regulator configurable to be regulated to a plurality of output values indexed from 1 to N, wherein N is a positive integer;

a plurality of feedback terminals indexed from 1 to N configured to provide a plurality of feedback voltages indexed from 1 to N corresponding to the plurality of output values indexed from 1 to N; and

a plurality of voltage dividing devices coupled in series between the input terminal and ground, wherein the plurality of feedback terminals indexed from 1 to N are provided from N different leading out positions on the plurality of voltage dividing devices, and wherein the plurality of output values indexed from 1 to N corresponding to the plurality of feedback voltages indexed from 1 to N are successively and independently trimmed to their desired values via successively trimming the leading out positions of the plurality of feedback terminals indexed from 1 to N on the plurality of voltage dividing devices.

12. The trimming circuit of claim 11, wherein the plurality of voltage dividing devices comprises:

a group of resistive voltage dividing devices indexed from 1 to N+1 coupled in series between the output voltage and ground with a terminal of the resistive voltage dividing device indexed by 1 connected to ground and a terminal of the resistive voltage dividing device indexed by N+1 connected to the output voltage; and

a group of trimming units indexed from 1 to N configured to provide the plurality of feedback terminals indexed from 1 to N, wherein

the trimming unit indexed by X is coupled between the resistive voltage dividing device indexed by X and the resistive voltage dividing device indexed by X+1, and wherein

the trimming unit indexed by X is configured to provide the feedback terminal indexed by X at a predetermined leading out position before trimming, and wherein

the trimming unit indexed by X is further configured to trim the leading out position of the feedback terminal indexed by X on the trimming unit indexed by X so as to trim the output value indexed by X to its desired value, and wherein

X successively changes from 1 to N.

13. The trimming circuit of claim 12, wherein

the resistive voltage dividing device indexed by X has an equivalent resistance identified by R_X;

and wherein

the trimming unit indexed by X has an equivalent resistance identified by Δ

R_X; and

wherein

the trimming for the output value indexed by X has a trimming range related to the ratio between Δ

R_X and R_X.

14. The trimming circuit of claim 12, wherein the trimming for the output value indexed by X has a predetermined trimming step.

15. The trimming circuit of claim 12, wherein trimming unit indexed by X comprises:

a first trimming branch having a first terminal coupled to the resistive voltage dividing device indexed by X and a second terminal coupled to the resistive voltage dividing device indexed by X+1, wherein the first trimming branch comprises a resistor having a resistance identified by Δ

R_X; and

a second trimming branch comprising;

a first group of M+1 series coupled trimming resistors having a first terminal coupled to the feedback terminal indexed by X, and a second terminal coupled to the first terminal of the first trimming branch via a resistor identified by RS_X, wherein the first group of M+1 trimming resistors respectively have the resistances successively identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X;

a second group of M+1 series coupled trimming resistors having a first terminal coupled to the X^th feedback terminal, and a second terminal coupled to the second terminal of the first trimming branch via a resistor identified by RS_X, wherein the second group of M+1 trimming resistors respectively have the resistances successively identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X; and

2(M+1) trimming fuses correspondingly coupled in parallel with each of the trimming resistors;

wherein

M is a non-negative integer; and

wherein

M, M−

1, . . . , 0 are the trimming weighted index numbers for the M+1 series coupled trimming resistors respectively having the resistances successively identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X.

16. The trimming circuit of claim 15, wherein the resistance identified by Δ

R_X is much smaller than the resistances identified by 2^M RT_X, 2<sup>M−

1</sup> RT_X, . . . , 2⁰ RT_X, and RS_X, and wherein the resistance identified by RS_X is much smaller than the total resistance of the M+1 series coupled trimming resistors identified by (2^M+2<sup>M−

1</sup>+ . . . 2⁰)RT_X.

17. The trimming circuit of claim 15, wherein the trimming unit indexed by X is configured to trim the leading out position of the feedback terminal indexed by X on the second trimming branch via selectively cutting off a plurality of trimming fuses coupled to a selected plurality of trimming resistors among the first group of M+1 trimming resistors and the second group of M+1 trimming resistors.

18. The trimming circuit of claim 15, wherein the trimming unit indexed by X is configured to trim the leading out position of the feedback terminal indexed by X on the second trimming branch via selectively cutting off a first plurality of trimming fuses coupled to a first plurality of selected trimming resistors among the first group of M+1 trimming resistors, and a second plurality of trimming fuses coupled to a second plurality of selected trimming resistors among the second group of M+1 trimming resistors, wherein the trimming weighted index numbers of the first plurality of selected trimming resistors and the trimming weighted index numbers of the second plurality of selected trimming resistors are complementary such that the total resistance contributed to the second trimming branch by the first group of M+1 trimming resistors and the second group of M+1 trimming resistors maintains at a resistance identified by (2^M+2^M−

1+ . . . 2⁰)RT_X during trimming.

19. A method for trimming an output voltage of a voltage regulator, comprising:

coupling a plurality of voltage dividing devices in series between the output voltage and ground;

providing a plurality of feedback terminals indexed from 1 to N leading out from N different positions on the plurality of voltage dividing devices, wherein N is a positive integer, and wherein the plurality of feedback terminals having a plurality of feedback voltages indexed from 1 to N respectively corresponding to a plurality of output values indexed from 1 to N of the output voltage; and

trimming the leading out positions of the plurality of feedback terminals indexed from 1 to N on the plurality of voltage dividing devices successively so as to trim the plurality of output values indexed from 1 to N successively and independently.

20. The method of claim 19, wherein the plurality of voltage dividing devices comprises a group of resistive voltage dividing devices indexed from 1 to N+1, and a group of trimming units indexed from 1 to N, and wherein the method further comprises:

coupling the group of resistive voltage dividing devices indexed from 1 to N+1 in series between the output voltage and ground with a terminal of the resistive voltage dividing device indexed by 1 connected to ground and a terminal of the resistive voltage dividing device indexed by N+1 connected to the output voltage;

coupling the trimming unit indexed by X between the resistive voltage dividing device indexed by X and the resistive voltage dividing device indexed by X+1, wherein X changes from 1 to N;

providing the feedback terminal indexed by X at a predetermined leading out position on the trimming unit indexed by X before trimming, wherein X changes from 1 to N; and

trimming the leading out positions of the plurality of feedback terminals indexed from 1 to N on the trimming units indexed from 1 to N respectively and successively so as to trim the plurality of output values indexed from 1 to N successively and independently.