THREE-DIMENSIONAL COILING VIA STRUCTURE FOR IMPEDANCE TUNING OF IMPEDANCE DISCONTINUITY

• US 20120112868A1
• Filed: 05/04/2011
• Published: 05/10/2012
• Est. Priority Date: 11/09/2010
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Wu, Zhonghua (Ken), Sharifi, Reza
• Granted Patent: US 8,723,048 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 41/041 Printed circuit coils apparatus or processes for manufacturing printed circuits in general H05K3/00
• CPC Class Codes: H01F 5/003 Printed circuit coils
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H05K 1/0233 Filters, inductors or a magnetic substance
• CPC Class Codes: H05K 1/0298 Multilayer circuits
• CPC Class Codes: H05K 1/165 incorporating printed inductors
• CPC Class Codes: H05K 2203/041 Solder preforms in the shape of solder balls
• CPC Class Codes: H05K 3/3436 having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: Y10T 29/49124 On flat or curved insulated base, e.g., printed circuit, etc.

Abstract

Methods, systems, and apparatuses are provided for three-dimensional coiling via structures. A substrate includes a plurality of insulating layers, a plurality of trace layers interleaved with the insulating layers, and a three-dimensional coiling via. The three-dimensional coiling via includes a plurality of electrically conductive traces and a plurality of electrically conductive vias through the insulating layers. The electrically conductive traces are present in at least two of the traces layers and are coupled together by the electrically conductive vias. The electrically conductive traces are arranged to form at least one partial turn around an axis through the substrate.

Claims

1. A substrate, comprising:

a plurality of insulating layers;

a plurality of trace layers interleaved with the insulating layers; and

a three-dimensional (3D) coiling via that includes a plurality of electrically conductive traces and a plurality of electrically conductive vias through the insulating layers, the electrically conductive traces being present in at least two of the traces layers and being coupled together by the electrically conductive vias, the electrically conductive traces being arranged to form at least one partial turn around an axis through the substrate.

2. The substrate of claim 1, wherein the 3D coiling via includes:

an electrically conductive first via through a first insulating layer having opposing first and second surfaces;

a first via pad for the first via and an electrically conductive first trace connected to the first via pad in a first trace layer on the first surface of the first insulating layer;

an electrically conductive second via through a second insulating layer having a first surface attached to the first insulating layer over the first trace layer, the second via being connected to the first trace;

an electrically conductive second trace in a second trace layer on a second surface of the second insulating layer that is connected to the second via;

an electrically conductive third via through a third insulating layer having a first surface attached to the second insulating layer over the second trace layer, the third via being connected to the second trace; and

an electrically conductive third trace in a third trace layer on a second surface of the third insulating layer that is connected to the third via;

the electrically conductive second and third traces being arranged to form at least a partial turn around an axis through the substrate.

3. The substrate of claim 2, further comprising:

an electrically conductive fourth via through a fourth insulating layer having a first surface attached to the third insulating layer over the third trace layer, the fourth via being connected to the third trace; and

a first land pad connected to the fourth via in a fourth trace layer on a second surface of the fourth insulating layer.

4. The substrate of claim 2, wherein the electrically conductive first via is coaxial with the axis through the substrate.

5. The substrate of claim 2, wherein the electrically conductive first via is not coaxial with the axis through the substrate.

6. The substrate of claim 3, further comprising:

a second via pad for the first via and an electrically conductive fourth trace connected to the second via pad in a fourth trace layer on the second surface of the first insulating layer;

an electrically conductive fourth via through a fourth insulating layer having a first surface attached to the first insulating layer over the fourth trace layer, the fourth via being connected to the fourth trace;

an electrically conductive fifth trace in a fifth trace layer on a second surface of the fourth insulating layer that is connected to the fourth via;

an electrically conductive fifth via through a fifth insulating layer having a first surface attached to the fourth insulating layer over the fifth trace layer, the fifth via being connected to the fifth trace; and

an electrically conductive sixth trace in a sixth trace layer on a second surface of the fifth insulating layer that is connected to fifth via;

the fifth and electrically conductive sixth traces being arranged to form at least a partial turn around a second axis through the substrate.

7. The substrate of claim 1, wherein the electrically conductive traces include at least one straight trace.

8. The substrate of claim 1, wherein the electrically conductive traces include at least one curved trace.

9. The substrate of claim 1, wherein the electrically conductive vias include at least one microvia.

10. An electrical conductor through a substrate, comprising:

an electrically conductive first via through a first insulating layer having opposing first and second surfaces;

a first via pad for the first via and an electrically conductive first trace connected to the first via pad in a first trace layer on the first surface of the first insulating layer;

an electrically conductive second via through a second insulating layer having a first surface attached to the first insulating layer over the first trace layer, the second via being connected to the first trace;

an electrically conductive second trace in a second trace layer on a second surface of the second insulating layer that is connected to the second via;

an electrically conductive third via through a third insulating layer having a first surface attached to the second insulating layer over the second trace layer, the third via being connected to the second trace; and

an electrically conductive third trace in a third trace layer on a second surface of the third insulating layer that is connected to the third via;

the electrically conductive second and third traces being arranged to form at least a partial turn around an axis through the substrate.

11. The electrical conductor of claim 10, further comprising:

an electrically conductive fourth via through a fourth insulating layer having a first surface attached to the third insulating layer over the third trace layer, the fourth via being connected to the third trace; and

a first land pad connected to the fourth via in a fourth trace layer on a second surface of the fourth insulating layer.

12. The electrical conductor of claim 10, further comprising:

a second via pad for the first via and an electrically conductive fourth trace connected to the second via pad in a fourth trace layer on the second surface of the first insulating layer;

an electrically conductive fourth via through a fourth insulating layer having a first surface attached to the first insulating layer over the fourth trace layer, the fourth via being connected to the fourth trace;

an electrically conductive fifth trace in a fifth trace layer on a second surface of the fourth insulating layer that is connected to the fourth via;

an electrically conductive fifth via through a fifth insulating layer having a first surface attached to the fourth insulating layer over the fifth trace layer, the fifth via being connected to the fifth trace; and

an electrically conductive sixth trace in a sixth trace layer on a second surface of the fifth insulating layer that is connected to fifth via;

the fifth and electrically conductive sixth traces being arranged to form at least a partial turn around a second axis through the substrate.

13. The electrical conductor of claim 10, wherein the electrically conductive second trace is a straight trace.

14. The electrical conductor of claim 10, wherein the electrically conductive second trace is a curved trace.

15. The electrical conductor of claim 10, further comprising:

at least one additional electrically conductive trace formed in a corresponding trace layer, the second, third, and at least one additional electrically conductive traces being arranged to form the at least a partial turn around the axis through the substrate.

16. A method of forming a conductor through a substrate, comprising:

forming an electrically conductive first via through a first insulating layer that has opposing first and second surfaces;

forming a first via pad for the first via and an electrically conductive first trace connected to the first via pad in a first trace layer on the first surface of the first insulating layer;

attaching a first surface of a second insulating layer to the first insulating layer over the first trace layer, the second insulating layer having an electrically conductive second via through the second insulating layer that is connected to the first trace;

forming an electrically conductive second trace in a second trace layer on a second surface of the second insulating layer that is connected to the second via;

attaching a first surface of a third insulating layer to the second insulating layer over the second trace layer, the third insulating layer having an electrically conductive third via through the third insulating layer that is connected to the second trace; and

forming an electrically conductive third trace in a third trace layer on a second surface of the third insulating layer that is connected to the third via;

the electrically conductive second and third traces being arranged to form at least a partial turn around an axis through the substrate.

17. The method of claim 16, further comprising:

attaching a first surface of a fourth insulating layer to the third insulating layer over the third trace layer, the fourth insulating layer having an electrically conductive fourth via through the fourth insulating layer that is connected to the third trace; and

forming a first land pad connected to the fourth via in a fourth trace layer on a second surface of the fourth insulating layer.

18. The method of claim 16, further comprising:

forming a second via pad for the first via and an electrically conductive fourth trace connected to the second via pad in a fourth trace layer on the second surface of the first insulating layer;

attaching a first surface of a fourth insulating layer to the second surface of the first insulating layer over the fourth trace layer, the fourth insulating layer having an electrically conductive fourth via through the fourth insulating layer that is connected to the fourth trace;

forming an electrically conductive fifth trace in a fifth trace layer on a second surface of the fourth insulating layer that is connected to the fourth via;

attaching a first surface of a fifth insulating layer to the fourth insulating layer over the fifth trace layer, the fifth insulating layer having an electrically conductive fifth via through the fifth insulating layer that is connected to the fifth trace; and

forming an electrically conductive sixth trace in a sixth trace layer on a second surface of the fifth insulating layer that is connected to fifth via;

the fifth and electrically conductive sixth traces being arranged to form at least a partial turn around a second axis through the substrate.

19. The method of claim 16, wherein said forming an electrically conductive second trace comprises:

forming the electrically conductive second trace as a straight trace.

20. The method of claim 16, wherein said forming an electrically conductive second trace comprises:

forming the electrically conductive second trace to be a curved trace.