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Dual-Port Semiconductor Memory and First-In First-Out (FIFO) Memory Having Electrically Floating Body Transistor

  • US 20120120752A1
  • Filed: 11/15/2011
  • Published: 05/17/2012
  • Est. Priority Date: 11/16/2010
  • Status: Active Grant
First Claim
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1. A multi-port semiconductor memory cell comprising:

  • a plurality of gates;

    a common body region of a first conductivity type configured to store a charge that is indicative of a memory state of said memory cell; and

    a plurality of conductive regions of a second conductivity type,wherein one of the plurality of conductive regions separates each of the plurality of gates from the other of the plurality of gates.

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