DEVICE AND METHOD FOR FORMING FINS IN INTEGRATED CIRCUITRY

• US 20120126326A1
• Filed: 11/23/2010
• Published: 05/24/2012
• Est. Priority Date: 11/23/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chang, Chih-Sheng, Lin, Yi-Tang, Shieh, Ming-Feng, Wang, Chien-Hsun
• Granted Patent: US 8,525,267 B2
• Time in Patent Office: Days
• US Class Current: 257/365
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/845 including field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 27/1211 combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

A semiconductor FinFET device includes a plurality of gate lines formed in a first direction, and two types of fin structures. A first type of fin structures is formed in a second direction, and a second type of fin structures formed perpendicular to the first type of fin structures. A contact hole couples to one or more of the second type of fin structures.

Claims

1. A semiconductor FinFET device, comprising:

a plurality of gate lines formed in a first direction;

a first type of fin structures formed in a second direction;

a second type of fin structures formed perpendicular to the first type of fin structures; and

a contact hole coupled to one or more of the second type of fin structures.

2. The semiconductor FinFET device as claim 1, wherein the first type of fin structures are formed in a spacer-merging process.

3. The semiconductor FinFET device as claim 1, wherein the second type of fin structures are formed in a spacer-merging process.

4. The semiconductor FinFET device as claim 1, wherein the first direction is perpendicular to the second direction.

5. The semiconductor FinFET device as claim 1, wherein the first type of fin structures have a lateral width ranging from 5 nm to 180 nm.

6. The semiconductor FinFET device as claim 1, wherein the second type of fin structures have a lateral width ranging from 5 nm to 180 nm.

7. A semiconductor FinFET device, comprising:

a plurality of gate lines;

a plurality of first fin structures of a first type intersecting at least one of the gate lines;

a second fin structure of a second type displaced from but coupled to one of the first fin structures as an extrusion feature, and

a contact hole coupled to the extrusion feature of the second fin structure.

8. The semiconductor FinFET device as claim 7, wherein the first fin structures are formed in a spacer-merging process.

9. The semiconductor FinFET device as claim 7, wherein the second fin structure is formed in a spacer-merging process.

10. The semiconductor FinFET device as claim 7, wherein the extrusion feature of the second fin structure has a lateral width ranging from 5 nm to 180 nm.

11. A semiconductor FinFET device, comprising:

a first set of gate lines formed in a first direction;

a second set of gate lines formed in a second direction, wherein the first and second directions are perpendicular to each other;

first fin structures of a first type intersecting the first set of gate lines in the second direction;

second fin structures of a second type intersecting the second set of gate lines in the first direction; and

a first contact hole coupled to one or more of the first or second fin structures.

12. The semiconductor FinFET device as claim 11, wherein the first fin structures are formed in a spacer-merging process.

13. The semiconductor FinFET device as claim 11, wherein the second fin structures are formed in a spacer-merging process.

14. The semiconductor FinFET device as claim 11, wherein the first fin structures have a lateral width ranging from 5 nm to 180 nm.

15. The semiconductor FinFET device as claim 11, wherein the second fin structures have a lateral width ranging from 5 nm to 180 nm.

16. The semiconductor FinFET device as claim 11, further comprising a third fin structure of a third type, wherein the third fin structure is displaced from but coupled to one of the first fin structures as an extrusion feature, and wherein a second contact hole is coupled to the extrusion feature of the third fin structure.

17. The semiconductor FinFET device as claim 11, further comprising a fourth fin structure of a fourth type, wherein the fourth fin structure is displaced from but coupled to one of the second fin structures as an extrusion feature, and wherein a fourth contact hole is coupled to the extrusion feature of the fourth fin structure.