METHOD OF FORMING E-FUSE IN REPLACEMENT METAL GATE MANUFACTURING PROCESS
First Claim
1. A method of forming an electronic fuse comprising:
- forming a polysilicon structure on top of a semiconductor substrate;
implanting at least one dopant into said polysilicon structure to create a doped polysilicon layer in at least a top portion of said polysilicon structure;
subjecting said doped polysilicon layer to a reactive-ion-etching (RIE) process, said doped polysilicon layer being substantially unaffected by said RIE process; and
converting said polysilicon structure including said doped polysilicon layer into a silicide to form said electronic fuse.
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Abstract
Embodiment of the present invention provides a method of forming electronic fuse or commonly known as e-fuse. The method includes forming a polysilicon structure and a field-effect-transistor (FET) structure together on top of a common semiconductor substrate, the FET structure having a sacrificial gate electrode; implanting at least one dopant into the polysilicon structure to create a doped polysilicon layer in at least a top portion of the polysilicon structure; subjecting the polysilicon structure and the FET structure to a reactive-ion-etching (RIE) process, the RIE process selectively removing the sacrificial gate electrode of the FET structure while the doped polysilicon layer being substantially unaffected by the RIE process; and converting the polysilicon structure including the doped polysilicon layer into a silicide to form the electronic fuse.
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Citations
20 Claims
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1. A method of forming an electronic fuse comprising:
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forming a polysilicon structure on top of a semiconductor substrate; implanting at least one dopant into said polysilicon structure to create a doped polysilicon layer in at least a top portion of said polysilicon structure; subjecting said doped polysilicon layer to a reactive-ion-etching (RIE) process, said doped polysilicon layer being substantially unaffected by said RIE process; and converting said polysilicon structure including said doped polysilicon layer into a silicide to form said electronic fuse. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method comprising:
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forming a polysilicon structure and a field-effect-transistor (FET) structure together on top of a common semiconductor substrate, said FET structure having a sacrificial gate electrode; implanting at least one dopant into said polysilicon structure to create a doped polysilicon layer in at least a top portion of said polysilicon structure; subjecting said polysilicon structure and said FET structure to a reactive-ion-etching (RIE) process, said RIE process selectively removing said sacrificial gate electrode of said FET structure while said doped polysilicon layer being substantially unaffected by said RIE process; and converting said polysilicon structure including said doped polysilicon layer into a silicide to form said electronic fuse. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A method comprising:
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forming an electronic fuse (e-fuse) structure and a field-effect-transistor (FET) structure on top of a semiconductor substrate, said e-fuse structure including a polysilicon layer and said FET structure having a sacrificial gate electrode; implanting a boron (B) dopant into said polysilicon layer of said e-fuse structure to create a doped polysilicon layer in at least a top portion thereof; subjecting said e-fuse structure and said FET structure to a common reactive-ion-etching (RIE) process, said RIE process selectively removing said sacrificial gate electrode of said FET structure while causing no substantial changes to said e-fuse structure; and performing silicidation of said doped polysilicon layer to convert said e-fuse structure into an e-fuse. - View Dependent Claims (18, 19, 20)
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Specification