SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20120132905A1
• Filed: 11/16/2011
• Published: 05/31/2012
• Est. Priority Date: 11/30/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei
• Granted Patent: US 8,823,092 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a transistor in which the state of an interface between an oxide semiconductor layer and an insulating film (gate insulating layer) in contact with the oxide semiconductor layer is favorable; and a method for manufacturing the transistor. In order to obtain the transistor, nitrogen is added to a region of the oxide semiconductor layer in the vicinity of the interface with the gate insulating layer. Specifically, a concentration gradient of nitrogen is formed in the oxide semiconductor layer, and a region containing much nitrogen is provided at the interface with the gate insulating layer. By the addition of nitrogen, a region with high crystallinity can be formed in the region of the oxide semiconductor layer in the vicinity of the interface with the gate insulating layer, so that a stable interface state can be obtained.

Claims

1. A semiconductor device comprising:

a substrate;

a gate electrode layer over the substrate;

a first insulating layer in contact with the gate electrode layer;

an oxide semiconductor layer in contact with the first insulating layer; and

a second insulating layer in contact with the oxide semiconductor layer,

wherein the oxide semiconductor layer has a concentration gradient of nitrogen, which becomes higher as closer to the first insulating layer, and has a concentration gradient of oxygen, which becomes higher as closer to the second insulating layer.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer is non-single-crystalline.

3. The semiconductor device according to claim 1, wherein a region of the oxide semiconductor layer in a vicinity of an interface with the first insulating layer has higher crystallinity than other regions of the oxide semiconductor layer.

4. The semiconductor device according to claim 1, wherein a region of the oxide semiconductor layer in a vicinity of an interface with the first insulating layer has a wurtzite crystal structure.

5. The semiconductor device according to claim 1, wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the first insulating layer is higher than or equal to 1×

10²⁰/cm³ and lower than 7 atomic %.

6. The semiconductor device according to claim 1, wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the second insulating layer is higher than or equal to 1×

10¹⁷/cm³ and lower than 5×

10¹⁹/cm³.

7. A semiconductor device comprising:

a substrate;

a base insulating layer over the substrate;

an oxide semiconductor layer over the base insulating layer;

a gate insulating layer over the oxide semiconductor layer; and

a gate electrode layer over the gate insulating layer;

wherein the oxide semiconductor layer has a concentration gradient of nitrogen, which becomes higher as closer to the gate insulating layer, and has a concentration gradient of oxygen, which becomes higher as closer to the base insulating layer.

8. The semiconductor device according to claim 7, wherein the oxide semiconductor layer is non-single-crystalline.

9. The semiconductor device according to claim 7, wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has higher crystallinity than other regions of the oxide semiconductor layer.

10. The semiconductor device according to claim 7, wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has a wurtzite crystal structure.

11. The semiconductor device according to claim 7, wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer is higher than or equal to 1×

10²⁰/cm³ and lower than 7 atomic %.

12. The semiconductor device according to claim 7, wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the base insulating layer is higher than or equal to 1×

10¹⁷/cm³ and lower than 5×

10¹⁹/cm³.

13. A semiconductor device comprising:

a substrate;

a gate electrode layer over the substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer; and

a protective insulating layer over the oxide semiconductor layer;

wherein the oxide semiconductor layer has a concentration gradient of nitrogen, which becomes higher as closer to the gate insulating layer, and has a concentration gradient of oxygen, which becomes higher as closer to the protective insulating layer.

14. The semiconductor device according to claim 13, wherein the oxide semiconductor layer is non-single-crystalline.

15. The semiconductor device according to claim 13, wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has higher crystallinity than other regions of the oxide semiconductor layer.

16. The semiconductor device according to claim 13, wherein a region of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer has a wurtzite crystal structure.

17. The semiconductor device according to claim 13, wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the gate insulating layer is higher than or equal to 1×

10²⁰/cm³ and lower than 7 atomic %.

18. The semiconductor device according to claim 13, wherein a nitrogen concentration of the oxide semiconductor layer in a vicinity of an interface with the protective insulating layer is higher than or equal to 1×

10¹⁷/cm³ and lower than 5×

10¹⁹/cm³.

19. The semiconductor device according to claim 13, wherein a thickness of the protective insulating layer is greater than or equal to 50 nm.

20. The semiconductor device according to claim 13, further comprising a layer containing nitrogen between the gate electrode layer and the gate insulating layer,

wherein the layer containing nitrogen is in contact with the gate insulating layer.