SEMICONDUCTOR DEVICE

• US 20120132912A1
• Filed: 11/18/2011
• Published: 05/31/2012
• Est. Priority Date: 11/25/2010
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: SUEKAWA, Eisuke, Tarui, Yoichiro, Oritsuki, Yasunori
• Granted Patent: US 9,041,007 B2
• Time in Patent Office: Days
• US Class Current: 257/49
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/4941 with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7804 the other device being a pn-junction diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7815 with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
• CPC Class Codes: H01L 29/861 Diodes

Abstract

A MOSFET cell of a semiconductor device includes a polysilicon gate electrode and an n⁺-source region formed in an upper portion of an n⁻-drift layer. An interlayer insulating film covers the gate electrode. An Al source electrode extends on the interlayer insulating film. An Al gate pad is connected to the gate electrode. A barrier metal layer that prevents diffusion of aluminum is interposed between the source electrode and the interlayer insulating film, and between the gate pad and the gate electrode.

Claims

1. A semiconductor device, comprising:

a main transistor cell with a polysilicon gate electrode formed on a semiconductor layer, and a source region that is an impurity region formed in an upper portion of said semiconductor layer;

an interlayer insulating film covering said gate electrode;

a source electrode containing aluminum, the source electrode being connected to said source region while extending on said interlayer insulating film;

a gate pad containing aluminum, the gate pad being connected to said gate electrode; and

a barrier metal layer preventing diffusion of aluminum, the barrier metal layer being interposed between said source electrode and said interlayer insulating film, and between said gate pad and said gate electrode.

2. The semiconductor device according to claim 1, further comprising a current sensing cell, the current sensing cell having a gate electrode shared with said main transistor cell, the current sensing cell having a source electrode containing aluminum that is different from that of said main transistor cell,

wherein said barrier metal layer is also interposed between said source electrode of said current sensing cell and said interlayer insulating film.

3. The semiconductor device according to claim 1, further comprising:

a temperature sensing diode formed on said semiconductor layer and including a p-type polysilicon and an n-type polysilicon;

an anode electrode connected to said p-type polysilicon; and

a cathode electrode connected to said n-type polysilicon,

wherein said barrier metal layer is also interposed between said p-type polysilicon and said anode electrode as well as between said n-type polysilicon and said cathode electrode.

4. The semiconductor device according to claim 1, wherein said barrier metal layer is a Ti layer having a thickness of 40 nm or more.

5. The semiconductor device according to claim 1, wherein said barrier metal layer is a TiN layer having a thickness of 90 nm or more.

6. The semiconductor device according to claim 1, wherein said barrier metal layer is a TiSi layer having a thickness of 130 nm or more.

7. The semiconductor device according to claim 1, wherein said barrier metal layer has a two-layer structure including a TiSi layer and a Ti layer.

8. The semiconductor device according to claim 1, wherein said barrier metal layer has a two-layer structure including a TiN layer and a Ti layer.

9. The semiconductor device according to claim 3, wherein said barrier metal layer is any one of a TiSi layer, TiN layer, a two-layer structure including a TiSi layer and a Ti layer, and a two-layer structure including a TiN layer and a Ti layer.

10. The semiconductor device according to claim 1, further comprising a compound layer of said semiconductor layer and metal, the compound layer being formed at part of said source region in contact with said source electrode.

11. The semiconductor device according to claim 1, wherein said semiconductor layer is made of a wide-bandgap semiconductor.