Organic Light Emitting Display Device and Method for Manufacturing the Same

• US 20120132920A1
• Filed: 04/26/2011
• Published: 05/31/2012
• Est. Priority Date: 11/25/2010
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Park, Sun, Park, Jong-Hyun, Lee, Yul-Kyu, Kim, Dae-Woo
• Granted Patent: US 8,823,008 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors

Abstract

In an organic light emitting diode (OLED) display and a manufacturing method, an organic light emitting diode (OLED) display includes: a substrate; a semiconductor layer pattern formed on the substrate and including a first capacitor electrode; a gate insulating layer covering the semiconductor layer pattern; a first conductive layer pattern formed on the gate insulating layer and including a second capacitor electrode having at least a portion overlapping the first capacitor electrode; an interlayer insulating layer having a capacitor opening exposing a portion of the second capacitor electrode and covering the second capacitor electrode; and a second conductive layer pattern formed on the interlayer insulating layer, wherein the capacitor opening includes a first transverse side wall parallel to and overlapping the second capacitor electrode, a second transverse side wall parallel to and not overlapping the second capacitor electrode, and a longitudinal side wall connecting the first transverse side wall and the second transverse side wall to each other and overlapping the first capacitor electrode.

Claims

1. An organic light emitting diode (OLED) display comprising:

a substrate;

a semiconductor layer pattern formed on the substrate and including a first capacitor electrode;

a gate insulating layer covering the semiconductor layer pattern;

a first conductive layer pattern formed on the gate insulating layer and including a second capacitor electrode having at least a portion overlapping the first capacitor electrode;

an interlayer insulating layer having a capacitor opening exposing the portion of the second capacitor electrode and covering the second capacitor electrode; and

a second conductive layer pattern formed on the interlayer insulating layer,

wherein the capacitor opening includes a first transverse side wall parallel to and overlapping the second capacitor electrode, a second transverse side wall parallel to and not overlapping the second capacitor electrode, and a longitudinal side wall connecting the first transverse side wall and the second transverse side wall to each other and overlapping the first capacitor electrode.

2. The organic light emitting diode (OLED) display of claim 1, wherein the first capacitor electrode overlapped by the longitudinal side wall of the capacitor opening is a semiconductor layer doped with an impurity.

3. An organic light emitting diode (OLED) display comprising:

a substrate;

a semiconductor layer pattern formed on the substrate and including a first capacitor electrode;

a gate insulating layer covering the semiconductor layer pattern;

a first conductive layer pattern formed on the gate insulating layer and including a second capacitor electrode having at least a portion overlapping the first capacitor electrode;

an interlayer insulating layer including a capacitor opening exposing a portion of the second capacitor electrode and at least one doping hole overlapping the second capacitor electrode and the first capacitor electrode and exposing a portion of the second capacitor electrode near the capacitor opening, and covering the second capacitor electrode; and

a second conductive layer pattern formed on the interlayer insulating layer.

4. The organic light emitting diode (OLED) display of claim 3, wherein the first capacitor electrode overlapped by at least one doping hole is a semiconductor layer doped with an impurity.

5. The organic light emitting diode (OLED) display of claim 3, wherein a portion of a region of the first conductive layer pattern is formed of a single transparent conductive layer, and another portion of the region is formed of a transparent conductive layer and a plurality of metal layers deposited on the transparent conductive layer.

6. The organic light emitting diode (OLED) display of claim 5, wherein the capacitor opening is formed through an etching process, and the etching process includes a cleaning process using a solution including hydrofluoric acid (HF).

7. The organic light emitting diode (OLED) display of claim 6, wherein at least one metal layer among the plurality of metal layers except for the highest layer is relatively more easily eroded by the hydrofluoric acid solution than the highest layer.

8. The organic light emitting diode (OLED) display of claim 6, wherein at least one metal layer among the plurality of metal layers except for the highest layer includes aluminum.

9. The organic light emitting diode (OLED) display of claim 5, wherein at least a portion of the second capacitor electrode of the first conductive layer pattern exposed through the capacitor opening is formed of a single transparent conductive layer.

10. The organic light emitting diode (OLED) display of claim 9, wherein the first capacitor electrode overlapped by the second capacitor electrode formed of the single transparent conductive layer is doped with an impurity.

11. A method for manufacturing an organic light emitting diode (OLED) display comprising:

providing a substrate;

forming a semiconductor layer pattern including a first capacitor electrode on the substrate;

forming a gate insulating layer covering the semiconductor layer pattern;

forming a first conductive layer pattern intermediate including a second capacitor electrode intermediate having at least a portion overlapping the first capacitor electrode on the gate insulating layer;

forming an interlayer insulating layer having a capacitor opening exposing a portion of the second capacitor electrode intermediate and covering the first conductive layer pattern intermediate; and

partially etching the first conductive layer pattern intermediate while forming the second conductive layer pattern on the interlayer insulating layer to complete the first conductive layer pattern,

wherein the capacitor opening includes a first transverse side wall parallel to and overlapping the second capacitor electrode, a second transverse side wall parallel to and not overlapping the second capacitor electrode, and a longitudinal side wall connecting the first transverse side wall and the second transverse side wall to each other and overlapping the first capacitor electrode.

12. The method of claim 11, wherein the first capacitor electrode overlapped by the longitudinal side wall of the capacitor opening is a semiconductor layer doped with an impurity.

13. A method for manufacturing an organic light emitting diode (OLED) display, comprising:

providing a substrate;

forming a semiconductor layer pattern including a first capacitor electrode on the substrate;

forming a gate insulating layer covering the semiconductor layer pattern;

forming a first conductive layer pattern intermediate including a second capacitor electrode intermediate having at least a portion overlapping the first capacitor electrode on the gate insulating layer;

forming an interlayer insulating layer including a capacitor opening exposing a portion of the second capacitor electrode and at least one doping hole overlapping the second capacitor electrode and the first capacitor electrode and exposing a portion of the second capacitor electrode near the capacitor opening, and covering the second capacitor electrode; and

partially etching the first conductive layer pattern intermediate while forming the second conductive layer pattern on the interlayer insulating layer to complete the first conductive layer pattern.

14. The method of claim 13, further comprising doping an impurity to the first capacitor electrode through at least one doping hole.

15. The method of claim 14, wherein a portion of a region of the first conductive layer pattern is formed of a single transparent conductive layer, and another portion of the region is formed of a transparent conductive layer and a plurality of metal layers deposited on the transparent conductive layer.

16. The method of claim 15, wherein the capacitor opening is formed through an etching process, and the etching process includes a cleaning process using a solution including hydrofluoric acid (HF).

17. The method of claim 16, wherein at least one of metal layer among the plurality of metal layers except for the highest layer is relatively more easily eroded by the hydrofluoric acid solution than the highest layer.

18. The method of claim 16, wherein at least one metal layer among the plurality of metal layers except for the highest layer includes aluminum.

19. The method of claim 15, wherein at least a portion of the second capacitor electrode of the first conductive layer pattern exposed through the capacitor opening is formed of the single transparent conductive layer.

20. The method of claim 19, wherein the first capacitor electrode overlapped by the second capacitor electrode formed of the single transparent conductive layer is doped with an impurity.