SEMICONDUCTOR DEVICE HAVING STACKED STRUCTURE INCLUDING THROUGH-SILICON-VIAS AND METHOD OF TESTING THE SAME
First Claim
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1. A semiconductor device comprising:
- a first semiconductor layer;
one or more second semiconductor layers stacked on the first semiconductor layer; and
a plurality of input through-silicon-vias (TSVs) to transmit signals from a plurality of input pads, respectively,wherein in a test mode, a test signal from the plurality of input pads is transmitted through at least two test paths, and the test signal transmitted through each of the test paths is output as a test result with respect to each of the plurality of input TSVs through an output pad.
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Abstract
A semiconductor device having a stacked structure including through-silicon-vias (TSVs) and a method of testing the semiconductor device. The semiconductor device includes a first semiconductor layer, one or more second semiconductor layers stacked on the first semiconductor layer, and a plurality of input through-silicon-vias (TSVs) to transmit signals from a plurality of input pads, respectively. In a test mode, a test signal from the plurality of input pads is transmitted through at least two test paths, and the test signal transmitted through each of the test paths is output as a test result with respect to each of the plurality of input TSVs through an output pad.
126 Citations
20 Claims
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1. A semiconductor device comprising:
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a first semiconductor layer; one or more second semiconductor layers stacked on the first semiconductor layer; and a plurality of input through-silicon-vias (TSVs) to transmit signals from a plurality of input pads, respectively, wherein in a test mode, a test signal from the plurality of input pads is transmitted through at least two test paths, and the test signal transmitted through each of the test paths is output as a test result with respect to each of the plurality of input TSVs through an output pad. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor device comprising:
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a first semiconductor layer; one or more second semiconductor layers stacked on the first semiconductor layer; and a plurality of output through-silicon-vias (TSVs) to transmit signals through a plurality of output pads, respectively, wherein in a test mode, a test signal from a plurality of input pads is transmitted through at least two test paths, and the test signal transmitted through each of the test paths is output as a test result with respect to each of the plurality of output TSVs through the plurality of output pads. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A semiconductor device comprising:
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a first semiconductor layer including an input pad to receive a test signal and an output pad to output the test signal; a second semiconductor layer connected to the first semiconductor layer by at least one through-silicon-via (TSV); and a path selecting unit to select at least one of a plurality of paths to transmit the test signal from the input pad to the output pad, wherein the plurality of paths include at least one path electrically insulated from the at least one TSV and at least one path electrically connected to the at least one TSV. - View Dependent Claims (17, 18, 19, 20)
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Specification