Gate-Based Output Power Level Control Power Amplifier

• US 20120139635A1
• Filed: 12/02/2011
• Published: 06/07/2012
• Est. Priority Date: 12/05/2010
• Status: Active Grant

• Current Assignee: Qorvo International Pte. Ltd. (Qorvo, Inc.)
• Original Assignee: Amalfi Semiconductor, Inc. (Qorvo, Inc.)
• Inventors: Ho, Daniel, Franck, Stephen, Shi, Ying, Scott, Baker
• Granted Patent: US 8,749,309 B2
• Time in Patent Office: Days
• US Class Current: 330/278
• CPC Class Codes: H03F 1/0233 by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 2200/18 the bias of the gate of a FET being controlled by a control signal
• CPC Class Codes: H03F 2200/405 the output amplifying stage of an amplifier comprising more than three power stages
• CPC Class Codes: H03F 2200/465 Power sensing
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03G 1/007 using FET type devices
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04

Abstract

A gate power control technique for a power amplifier (PA) provides practical improved efficiency at backed-off power levels. It can be applied to the main gate of the output stage of the PA, the cascode gate, or any combination thereof. Both voltage mode and current mode signal processing may be used. The gate power control can be implemented in both open-loop and closed-loop using AC and DC coupled drivers and output stages. It may further use one or more control ports in the radio frequency (RF) signal path.

Claims

1. A power amplifier (PA) system comprising:

a radio frequency (RF) signal path comprising a plurality of gain stages each gain stage having at least an input gate of a metal-oxide semiconductor (MOS) transistor; and

a power control unit coupled to combine with an input gate of at least one of the plurality of gain stages.

2. The PA system of claim 1, wherein the at least an input gate is at least one of:

a main gate of an output stage of the signal path, a cascode gate of an output stage of the signal path.

3. The PA system of claim 1, further comprising a drain control port for drain power control.

4. The PA system of claim 1, wherein the gate-based power control unit operates in an open-loop mode.

5. The PA system of claim 1, wherein the gate-based power control unit operates in a closed-loop mode.

6. The PA system of claim 5, further comprising:

at least a sensor for sensing an output power of the PA system; and

a power estimator providing an power estimation to the power control unit respective of at least the sensed output power.

7. A method for controlling power of a power amplifier (PA) system comprising:

controlling power of at least an input gate of a metal-oxide semiconductor (MOS) transistor of a power amplifier stage of the power amplifier system using a power control unit that is coupled to combine with an input gate of at least one of a plurality of gain stages feeding into the power amplifier stage.

8. The method of claim 7, wherein the at least one input gate is at least one of:

a main gate of an output stage of the signal path, a cascode gate of an output stage of the signal path.

9. The method of claim 7, wherein the power control unit operates in an open-loop mode.

10. The method of claim 7, wherein the power control unit operates in a closed-loop mode.

11. The method of claim 10, further comprising:

sensing an output power of the PA system;

estimating the power of the PA system; and

providing the power estimation to the power control unit.

12. A power amplifier (PA) system comprising:

a radio frequency (RF) path; and

a power control block comprising one or more RF output sensors.

13. The PA system of claim 12, wherein the power control block performs RF to baseband conversion of at least a signal sensed by the RF output sensors by at least one of:

mixing with an independent clock signal, self-mixing, sub-sampling, over-sampling, non-linear distortion.

14. A power amplifier (PA) system comprising:

a radio frequency (RF) signal path;

a power control block; and

one or more supplemental control ports for controlling power of the PA system.

15. The system of claim 14, wherein the one or more supplemental control ports are driven by one or more of:

a load impedance sensor, a temperature sensor, a phase angle sensor, a supply voltage sensor, a process sensor, a power range sensor, and a frequency range sensor.