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METHOD FOR ESTIMATING THE LIFESPAN OF A DEEP-SUB-MICRON INTEGRATED ELECTRONIC CIRCUIT

  • US 20120143557A1
  • Filed: 06/30/2010
  • Published: 06/07/2012
  • Est. Priority Date: 07/01/2009
  • Status: Active Grant
First Claim
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1. Method for estimating the lifetime (TTFAPPLI) of a deep-submicron-generation integrated electronic component, linked to a wear mechanism occurring in previously defined special conditions of use, said component being of a deep submicron type, with very large-scale integration (VLSI), commercially available off the shelf,characterized in that it is assumed that the same sample population always experiences a failure due to:

  • the most predominant failure mechanism, during the period of useful life, described by an exponential law,the most critical wear mechanism, represented by a Weibull distribution at the end of the previous period,and in that the method comprises the following steps;

    Step 101

    of receiving and storing predefined elements of technical information about the component, in particular the power supply voltage(s), technological data (node, FEOL and BEOL description), the technical description of the encapsulation and the addressing data for the component,Step 106

    of analyzing the component'"'"'s sensitivity with regard to specific conditions of use,Step 116

    of selecting the most critical bottom of the bath and wear mechanisms, and associated accelerated tests.

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