Method and Apparatus for Performing Refresh Operations in High-Density Memories

• US 20120144105A1
• Filed: 12/03/2010
• Published: 06/07/2012
• Est. Priority Date: 12/03/2010
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Dodson, John S., Goodman, Benjiman L., Hunter, Hillery C., Powell, Stephen, Stuecheli, Jeffrey A.
• Granted Patent: US 8,489,807 B2
• Time in Patent Office: Days
• US Class Current: 711/106
• CPC Class Codes: G11C 11/40603 Arbitration, priority and concurrent access to memory cells for read/write or refresh operations

Abstract

A method for performing refresh operations is disclosed. In response to a completion of a memory operation, a determination is made whether or not a refresh backlog count is greater than a first predetermined value. In a determination that the refresh backlog count is greater than the first predetermined value, a refresh operation is performed as soon as possible. In a determination that the refresh backlog count is not greater than the first predetermined value, a refresh operation is performed after a delay of an idle count value.

Claims

1. A method for performing refresh operations, said method comprising:

in response to a completion of a memory operation, determining whether or not a refresh backlog count is greater than a first predetermined value;

in a determination that said refresh backlog count is greater than said first predetermined value, performing a refresh operation as soon as possible; and

in a determination that said refresh backlog count is not greater than said first predetermined value, performing a refresh operation after a delay of an idle count value.

2. The method of claim 1, wherein said first predetermined value is 7.

3. The method of claim 1, wherein said idle count value is negatively proportional to said refresh backlog count.

4. The method of claim 1, wherein said method further includes

determining whether or not said refresh backlog count is less than a second predetermined value;

in a determination that said refresh backlog count is less than said second predetermined value, performing a refresh operation after a delay of a maximum idle count value.

5. The method of claim 3, wherein said second predetermined value is 3.

6. A computer readable medium having a computer program product for performing refresh operations, said computer readable medium comprising:

computer program code for, in response to a completion of a memory operation, determining whether or not a refresh backlog count is greater than a first predetermined value;

computer program code for, in a determination that said refresh backlog count is greater than said first predetermined value, performing a refresh operation as soon as possible; and

computer program code for, in a determination that said refresh backlog count is not greater than said first predetermined value, performing a refresh operation after a delay of an idle count value.

7. The computer readable medium of claim 6, wherein said first predetermined value is 7.

8. The computer readable medium of claim 6, wherein said idle count value is negatively proportional to said refresh backlog count.

9. The computer readable medium of claim 6, wherein said computer readable medium further includes

determining whether or not said refresh backlog count is less than a second predetermined value;

in a determination that said refresh backlog count is less than said second predetermined value, performing a refresh operation after a delay of a maximum idle count value.

10. The computer readable medium of claim 9, wherein said second predetermined value is 7.

11. An apparatus for performing refresh operations, said apparatus comprising:

a comparator for, in response to a completion of a memory operation, determining whether or not a refresh backlog count is greater than a first predetermined value; and

a memory controller for performing a refresh operation as soon as possible in a determination that said refresh backlog count is greater than said first predetermined value, and for performing a refresh operation after a delay of an idle count value in a determination that said refresh backlog count is not greater than said first predetermined value.

12. The apparatus of claim 11, wherein said first predetermined value is 7.

13. The apparatus of claim 11, wherein said idle count value is negatively proportional to said refresh backlog count.

14. The apparatus of claim 11, wherein said memory controller performs a refresh operation after a delay of a maximum idle count value in a determination that said refresh backlog count is less than a second predetermined value.

15. The apparatus of claim 14, wherein said second predetermined value is 7.