Device using oxide semiconductor, display device, and electronic apparatus
First Claim
1. A device using an oxide semiconductor, the device comprisinga circuit part configured to include a thin film transistor using the oxide semiconductor as a channel material, whereinthe circuit part hasa lower interconnect formed in the same process as a process of a gate electrode of the thin film transistor,an upper interconnect intersecting the lower interconnect, andan interlayer insulating film provided between the lower interconnect and the upper interconnect,the interlayer insulating film includesan oxide semiconductor layer anda channel protective layer,the oxide semiconductor layer and the channel protective layer being stacked over the lower interconnect with intermediary of a gate insulating film in the same processes as processes of a channel layer and a channel protective layer of the thin film transistor, andthe channel protective layer is interposed between an outer circumferential surface of a rising part of the oxide semiconductor layer corresponding to thickness of the lower interconnect and the upper interconnect.
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Accused Products
Abstract
Disclosed herein is a device using an oxide semiconductor, the device including a circuit part configured to include a thin film transistor using the oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect, an upper interconnect, and an interlayer insulating film, the interlayer insulating film includes an oxide semiconductor layer and a channel protective layer, and the channel protective layer is interposed between an outer circumferential surface of a rising part of the oxide semiconductor layer corresponding to thickness of the lower interconnect and the upper interconnect.
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Citations
12 Claims
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1. A device using an oxide semiconductor, the device comprising
a circuit part configured to include a thin film transistor using the oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect formed in the same process as a process of a gate electrode of the thin film transistor, an upper interconnect intersecting the lower interconnect, and an interlayer insulating film provided between the lower interconnect and the upper interconnect, the interlayer insulating film includes an oxide semiconductor layer and a channel protective layer, the oxide semiconductor layer and the channel protective layer being stacked over the lower interconnect with intermediary of a gate insulating film in the same processes as processes of a channel layer and a channel protective layer of the thin film transistor, and the channel protective layer is interposed between an outer circumferential surface of a rising part of the oxide semiconductor layer corresponding to thickness of the lower interconnect and the upper interconnect.
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5. A device using an oxide semiconductor, the device comprising
a circuit part configured to include a thin film transistor using the oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect formed in the same process as a process of a gate electrode of the thin film transistor, an upper interconnect intersecting the lower interconnect, and an interlayer insulating film provided between the lower interconnect and the upper interconnect, and the interlayer insulating film is formed by stacking an oxide semiconductor layer and a channel protective layer over the lower interconnect with intermediary of a gate insulating film in the same processes as processes of a channel layer and a channel protective layer of the thin film transistor and removing the oxide semiconductor layer after the stacking.
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6. A device using an oxide semiconductor, the device comprising
a circuit part configured to include a thin film transistor, wherein the circuit part has a lower interconnect formed by using the same material as a material of a gate electrode of the thin film transistor, an upper interconnect intersecting the lower interconnect, and an interlayer insulating film provided between the lower interconnect and the upper interconnect, the interlayer insulating film includes an oxide semiconductor layer and a protective layer, the oxide semiconductor layer and the protective layer being stacked over the lower interconnect with intermediary of a gate insulating film by using the same materials as materials of a channel layer and a channel protective layer of the thin film transistor, and the protective layer is interposed between an outer circumferential surface of a rising part of the oxide semiconductor layer and the upper interconnect.
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7. A display device comprising:
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a pixel array part configured to be formed by arranging pixels each including an electrooptical element; and a circuit part configured to include a thin film transistor using an oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect formed in the same process as a process of a gate electrode of the thin film transistor, an upper interconnect intersecting the lower interconnect, and an interlayer insulating film provided between the lower interconnect and the upper interconnect, the interlayer insulating film includes an oxide semiconductor layer and a channel protective layer, the oxide semiconductor layer and the channel protective layer being stacked over the lower interconnect with intermediary of a gate insulating film in the same processes as processes of a channel layer and a channel protective layer of the thin film transistor, and the channel protective layer is interposed between an outer circumferential surface of a rising part of the oxide semiconductor layer corresponding to thickness of the lower interconnect and the upper interconnect.
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9. A display device comprising:
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a pixel array part configured to be formed by arranging pixels each including an electrooptical element; and a circuit part configured to include a thin film transistor using an oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect formed in the same process as a process of a gate electrode of the thin film transistor, an upper interconnect intersecting the lower interconnect, and an interlayer insulating film provided between the lower interconnect and the upper interconnect, and the interlayer insulating film is formed by stacking an oxide semiconductor layer and a channel protective layer over the lower interconnect with intermediary of a gate insulating film in the same processes as processes of a channel layer and a channel protective layer of the thin film transistor and removing the oxide semiconductor layer after the stacking.
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11. Electronic apparatus having a display device comprising:
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a pixel array part configured to be formed by arranging pixels each including an electrooptical element; and a circuit part configured to include a thin film transistor using an oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect formed in the same process as a process of a gate electrode of the thin film transistor, an upper interconnect intersecting the lower interconnect, and an interlayer insulating film provided between the lower interconnect and the upper interconnect, the interlayer insulating film includes an oxide semiconductor layer and a channel protective layer, the oxide semiconductor layer and the protective layer being stacked over the lower interconnect with intermediary of a gate insulating film by using the same materials as materials of a channel layer and a channel protective layer of the thin film transistor, and the channel protective layer is interposed between an outer circumferential surface of a rising part of the oxide semiconductor layer corresponding to thickness of the lower interconnect and the upper interconnect.
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12. Electronic apparatus having a display device comprising:
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a pixel array part configured to be formed by arranging pixels each including an electrooptical element; and a circuit part configured to include a thin film transistor using an oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect formed in the same process as a process of a gate electrode of the thin film transistor, an upper interconnect intersecting the lower interconnect, and an interlayer insulating film provided between the lower interconnect and the upper interconnect, and the interlayer insulating film is formed by stacking an oxide semiconductor layer and a channel protective layer over the lower interconnect with intermediary of a gate insulating film in the same processes as processes of a channel layer and a channel protective layer of the thin film transistor and removing the oxide semiconductor layer after the stacking.
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Specification