SYSTEMS FOR INDIRECT AVERAGE CURRENT MEASUREMENT

• US 20120153920A1
• Filed: 12/20/2010
• Published: 06/21/2012
• Est. Priority Date: 12/20/2010
• Status: Abandoned Application

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Cohen, Isaac, GUENTHER, GARY DAVID
• Application Number:
  US12/973,489
• Publication Number:
  US 20120153920A1
• Time in Patent Office: Days
• US Class Current: 323/285
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

One example of the invention relates to a power system. The power system can include a power converter configured to convert an input voltage to an output voltage for providing power at an output thereof to which a load is connectable. A measurement system can include measurement circuitry configured to measure an average of an accessible current in the power converter and derive an average measurement of another current in the power converter based on timing control signals used to control operation of the power converter.

Claims

1. A system comprising:

a power converter configured to convert an input voltage to an output voltage for providing power at an output thereof to which a load is connectable; and

a measurement system that comprises measurement circuitry configured to measure an average of an accessible current in the power converter and derive an average measurement of another current in the power converter based on a timing control signal used to control operation of the power converter.

2. The system of claim 1, wherein the accessible current is an input current of the power converter and the another current is an output current of the power converter.

3. The system of claim 1, wherein the measurement system is configured according to a topology of the power converter.

4. The system of claim 3, wherein the topology of the power converter is one of a buck topology, a boost topology or a buck-boost topology.

5. The system of claim 1, wherein the measurement system further comprises an averaging circuit coupled to provide an output that is proportional to an average current through a switch during conduction of the switch.

6. The system of claim 5, further comprising timing logic configured to control sampling for the averaging circuit based on the timing control signal.

7. The system of claim 6, wherein the averaging circuit is a first averaging circuit, the measurement system further comprising a second averaging component configured to average the output from the first averaging circuit to provide an output representing the average of the another current.

8. The system of claim 7, further comprising an error amplifier configured to implement the second averaging component and to generate an error signal based on a difference between a reference and the average of the another current.

9. The system of claim 8, further comprising a modulator configured to generate the timing control signal for the switch based on the error signal as to provide closed loop current control for the power converter.

10. The system of claim 9, wherein the modulator comprises a first modulator of an inner control loop, the system further comprising an outer control loop configured to perform duty-cycle control on the timing control signal for reducing the output below a regulated output that is proportional to the reference.

11. The system of claim 7, wherein the accessible current is one of an input current of the power converter and an output current of the power converter, and the another current is the other of the power converter and the output current of the power converter.

12. A power system comprising:

an input source to supply input power;

a power converter configured to convert the input power to an output power, the power converter comprising;

a switch to conduct a switch current in response to a timing signal having a timing period;

an inductor to conduct current based at least in part on the switch current;

a rectifier configured to conduct current based at least in part on the switch current; and

a measurement system configured to provide a measure of average current through the switch during a selected portion of the timing period, the selected portion of the timing period depending on a topology of the power converter.

13. The system of claim 12, further comprising an averaging component configured to provide a time-averaged measure of the measure of average current through the switch during the selected portion of the timing period.

14. The system of claim 13, wherein the measurement system is configured to measure an average of an accessible current in the power converter and derive an average measurement of another current in the power converter based on timing control signals used to control operation of the power converter.

15. The system of claim 14, wherein the accessible current is an input current provided to the power converter and the another current is an output current provided to the load by the power converter.

16. The system of claim 15, wherein the measurement system is configured according to (i) the topology of the power converter, (ii) which current in the power converter is the accessible current and (iii) which current in the power converter is the another current.

17. The system of claim 16, wherein the topology of the power converter comprises one of a buck, boost or buck-boost topology.

18. The system of claim 14, wherein the measurement system further comprises an averaging circuit coupled to provide an output that represents an average current through the switch during the selected portion of the timing period.

19. The system of claim 18, further comprising timing circuitry configured to control sampling for the averaging circuit based on the timing signal and depending on the topology of the power converter.

20. The system of claim 18, wherein the averaging circuit is a first averaging circuit, the measurement system further comprising a second averaging circuit configured to measure a time average of the output from the first averaging circuit to provide an output corresponding to the average of the another current.

21. The system of claim 12, further comprising:

a feedback loop configured to generate an error signal based on a time-averaged measure of the average current through the switch during the selected portion of the timing period relative to a reference; and

a modulator to provide the timing signal based on the error signal as to provide closed loop control for the power system.

22. The system of claim 21, wherein the feedback loop comprises an inner loop and an outer loop, the outer loop being configured, when activated in a reduced power mode, to duty cycle modulate the inner loop for reducing the output of the system.