PLL CIRCUIT
First Claim
1. A PLL circuit, comprising:
- a phase comparator, which compares phases of a reference clock and a feedback clock, and outputs a phase comparison signal indicating a difference between the phases;
a charge pump circuit, which, during a time period corresponding to the difference in phases indicated by the phase comparison signal, outputs a first charge pump current and a second charge pump current;
a loop filter, which has a capacitor storing electric charge based on the first and second charge pump currents, and which generates a control voltage due to stored electric charge;
an oscillator, which generates an output clock at a frequency according to the control voltage;
a frequency divider, which frequency-divides the output clock and outputs the feedback clock; and
a charge pump adjustment circuit, which, when in a locked state, adjusts current quantity of the first or the second charge pump current such that the phase difference is suppressed, according to the phase difference indicated by the phase comparison signal.
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Accused Products
Abstract
A PLL circuit, has a phase comparator for comparing phases of a reference clock and a feedback clock, and outputting a phase comparison signal indicating the phase difference; a charge pump circuit, which, during a time period corresponding to the phase difference, outputs a first charge pump current and a second charge pump current; a loop filter, having a capacitor storing electric charge based on the first and second charge pump currents, which generates a control voltage due to stored electric charge; an oscillator generating an output clock at a frequency according to the control voltage; a frequency divider frequency-dividing the output clock and outputs the feedback clock; and a charge pump adjustment circuit, which, when in a locked state, adjusts current quantity of the first or the second charge pump current such that the phase difference is suppressed, according to the phase difference indicated by the phase comparison signal.
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Citations
10 Claims
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1. A PLL circuit, comprising:
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a phase comparator, which compares phases of a reference clock and a feedback clock, and outputs a phase comparison signal indicating a difference between the phases; a charge pump circuit, which, during a time period corresponding to the difference in phases indicated by the phase comparison signal, outputs a first charge pump current and a second charge pump current; a loop filter, which has a capacitor storing electric charge based on the first and second charge pump currents, and which generates a control voltage due to stored electric charge; an oscillator, which generates an output clock at a frequency according to the control voltage; a frequency divider, which frequency-divides the output clock and outputs the feedback clock; and a charge pump adjustment circuit, which, when in a locked state, adjusts current quantity of the first or the second charge pump current such that the phase difference is suppressed, according to the phase difference indicated by the phase comparison signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of adjustment of a PLL circuit having a phase comparator which compares phases of a reference clock and feedback clock and outputs a phase comparison signal indicating a difference between the phases, a charge pump circuit which outputs a first charge pump current and second charge pump current during a time period according to the difference in phases indicated by the phase comparison signal, a loop filter having a capacitor which stores electric charge based on the first and second charge pump currents and which generates a control voltage due to stored electric charge, an oscillator which generates an output clock at a frequency according to the control voltage, and a frequency divider which frequency-divides the output clock and outputs the feedback clock, the method comprising:
adjusting, when in a locked state, a current value of the first or second charge pump current such that the phase difference is suppressed, according to the difference in phases indicated by the phase comparison signal.
Specification