MULTIPLE DISPLAY FRAME RENDERING METHOD AND APPARATUS

• US 20120154411A1
• Filed: 12/15/2010
• Published: 06/21/2012
• Est. Priority Date: 12/15/2010
• Status: Active Grant

• Current Assignee: ATI Technologies ULC (Advanced Micro Devices, Inc.)
• Original Assignee: ATI Technologies ULC (Advanced Micro Devices, Inc.)
• Inventors: Cheng, Jeffrey G.
• Granted Patent: US 8,866,825 B2
• Time in Patent Office: Days
• US Class Current: 345/506
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining

Abstract

An apparatus includes a plurality of image processing circuits. Each image processing circuit generates an image frame corresponding to a single large surface. The first image processing circuit provides a portion of the generated image frame for a first display or plurality of displays and provides a remaining portion of the image frame to the remaining image processing circuits. The next image processing circuits provides the remaining portion of the image frame for the next plurality of displays.

Claims

1. An apparatus comprising:

at least a first image processing circuit that is operative to generate an image frame corresponding with a single large surface, wherein the first image processing circuit is operative to provide a portion of the image frame for at least a first display and to provide a remaining portion of the image frame to at least a second image processing circuit; and

the second image processing circuit, operatively coupled to the first image processing circuit, operative to provide the remaining portion of the image frame for at least a second display.

2. The apparatus of claim 1 wherein the first image processing circuit is operative to provide the remaining portion of the image frame after the second image processing circuit has presented a previous remaining portion of a previous image frame corresponding with the single large surface for the second display.

3. The apparatus of claim 1 wherein the second image processing circuit is operative to generate a second image frame concurrent with the first image processing circuit generating a third image frame.

4. The apparatus of claim 3 wherein the second image processing circuit is operative to provide a first portion of the second image frame for the second display and the second image processing circuit is operative to provide a remaining portion of the second image frame for the first display.

5. The apparatus of claim 1 wherein the first image processing circuit is operative to provide the portion of the image frame for the first display concurrently with the second image processing circuit providing the remaining portion of the image frame for the second display.

6. The apparatus of claim 1 wherein the first image processing circuit is operative to provide the portion of the image frame for the first display after the second processing circuit receives the remaining portion of the image frame.

7. The apparatus of claim 1 wherein the first processing circuit provides the portion of the image frame for a plurality of displays and wherein the second image processing circuit provides the remaining portion of the image frame to a second plurality of displays.

8. The apparatus of claim 7 comprising the first plurality of displays and the second plurality of displays operatively coupled to the first image processing circuit and the second image processing circuit respectively.

15. The apparatus of claim 1 wherein the first processing circuit provides the portion of the image frame for a plurality of displays and wherein the second image processing circuit provides the remaining portion of the image frame to a second plurality of displays.

9. A method comprising:

generating, with at least a first image processing circuit, an image frame corresponding with a single large surface;

providing, with the first image processing circuit, a portion of the image frame for at least a first display;

providing a remaining portion of the image frame to at least a second image processing circuit; and

providing the remaining portion of the image frame for at least a second display.

10. The method of claim 9 comprising providing the remaining portion of the image frame after the second image processing circuit has presented a previous remaining portion of a previous image frame corresponding with the single large surface for the second plurality of displays.

11. The method of claim 9 comprising generating, with the second image processing circuit, a second image frame concurrent with the first image processing circuit generating a third image frame.

12. The method of claim 11 comprising:

providing, with the second image processing circuit, a first portion of the second image frame for the second display; and

providing, with the second image processing circuit, a remaining portion of the second image frame for the first display.

13. The method of claim 9 comprising providing the portion of the image frame for the first display concurrently with providing the remaining portion of the image frame for the second display.

14. The method of claim 9 comprising providing the portion of the image frame for the first display after the second processing circuit receives the remaining portion of the image frame.

16. A computer readable medium comprising:

executable instructions stored therein that when executed by one or more image processing circuits, causes at least a first image processing circuit to;

generate an image frame corresponding with a single large surface;

provide a portion of the image frame for at least a first display; and

provide a remaining portion of the image frame for another image processing circuit.

17. The computer readable medium of claim 16 comprising executable instructions that when executed cause at least a second image processing circuit to provide the remaining portion of the image frame for a second display.

18. The computer readable medium of claim 16 comprising executable instructions that when executed cause the at least first image processing circuit to provide the remaining portion of the image frame after the at least second image processing circuit has presented a previous remaining portion of a previous image frame corresponding with the single large surface for a second display.

19. The computer readable medium of claim 16 comprising executable instructions that when executed cause the at least second image processing circuit to generate a second image frame concurrent with the first image processing circuit generating a third image frame.

20. The computer readable medium of claim 17 comprising executable instructions that when executed cause the at least second image processing circuit to:

provide a first portion of the second image frame for the second display; and

provide a remaining portion of the second image frame for the first display.